mirror of
https://github.com/im-tomu/foboot.git
synced 2024-09-20 10:50:10 +00:00
Flash mapping address fixes
- too many bits were allocated causing problems addressing 128Mbit devices - the shift operator in python generates a signed shift in verilog which potentilly trashes the upper address bit, switch to padding
This commit is contained in:
parent
1033016932
commit
1c8c1f3bc1
@ -478,8 +478,10 @@ class PicoRVSpi(Module, AutoCSR):
|
|||||||
]
|
]
|
||||||
|
|
||||||
flash_addr = Signal(24)
|
flash_addr = Signal(24)
|
||||||
mem_bits = bits_for(size)
|
# size/4 because data bus is 32 bits wide, -1 for base 0
|
||||||
self.comb += flash_addr.eq(bus.adr[0:mem_bits-2] << 2),
|
mem_bits = bits_for(int(size/4)-1)
|
||||||
|
pad = Signal(2)
|
||||||
|
self.comb += flash_addr.eq(Cat(pad, bus.adr[0:mem_bits-1]))
|
||||||
|
|
||||||
read_active = Signal()
|
read_active = Signal()
|
||||||
spi_ready = Signal()
|
spi_ready = Signal()
|
||||||
|
Loading…
Reference in New Issue
Block a user