mirror of
https://github.com/im-tomu/foboot.git
synced 2024-09-19 18:30:17 +00:00
sw: sync generated files
Sync the generated header and linker files, based on the current API. Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
Sean Cross
parent
602f06d38c
commit
436253e9d0
@ -1,5 +1,5 @@
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//--------------------------------------------------------------------------------
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// Auto-generated by Migen (ae42105) & LiteX (6a975e58) on 2019-07-08 16:22:23
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// Auto-generated by Migen (ae42105) & LiteX (ccbf1418) on 2019-07-09 19:02:56
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//--------------------------------------------------------------------------------
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#ifndef __GENERATED_CSR_H
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#define __GENERATED_CSR_H
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@ -16,631 +16,658 @@ extern uint32_t csr_readl(unsigned long addr);
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#endif /* ! CSR_ACCESSORS_DEFINED */
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/* ctrl */
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#define CSR_CTRL_BASE 0x82000000L
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#define CSR_CTRL_RESET_ADDR 0x82000000L
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#define CSR_CTRL_BASE 0xe0000000L
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#define CSR_CTRL_RESET_ADDR 0xe0000000L
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#define CSR_CTRL_RESET_SIZE 1
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static inline unsigned char ctrl_reset_read(void) {
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unsigned char r = csr_readl(0x82000000L);
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unsigned char r = csr_readl(0xe0000000L);
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return r;
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}
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static inline void ctrl_reset_write(unsigned char value) {
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csr_writel(value, 0x82000000L);
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csr_writel(value, 0xe0000000L);
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}
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#define CSR_CTRL_SCRATCH_ADDR 0x82000004L
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#define CSR_CTRL_SCRATCH_ADDR 0xe0000004L
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#define CSR_CTRL_SCRATCH_SIZE 4
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static inline unsigned int ctrl_scratch_read(void) {
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unsigned int r = csr_readl(0x82000004L);
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unsigned int r = csr_readl(0xe0000004L);
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r <<= 8;
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r |= csr_readl(0x82000008L);
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r |= csr_readl(0xe0000008L);
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r <<= 8;
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r |= csr_readl(0x8200000cL);
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r |= csr_readl(0xe000000cL);
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r <<= 8;
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r |= csr_readl(0x82000010L);
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r |= csr_readl(0xe0000010L);
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return r;
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}
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static inline void ctrl_scratch_write(unsigned int value) {
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csr_writel(value >> 24, 0x82000004L);
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csr_writel(value >> 16, 0x82000008L);
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csr_writel(value >> 8, 0x8200000cL);
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csr_writel(value, 0x82000010L);
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csr_writel(value >> 24, 0xe0000004L);
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csr_writel(value >> 16, 0xe0000008L);
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csr_writel(value >> 8, 0xe000000cL);
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csr_writel(value, 0xe0000010L);
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}
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#define CSR_CTRL_BUS_ERRORS_ADDR 0x82000014L
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#define CSR_CTRL_BUS_ERRORS_ADDR 0xe0000014L
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#define CSR_CTRL_BUS_ERRORS_SIZE 4
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static inline unsigned int ctrl_bus_errors_read(void) {
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unsigned int r = csr_readl(0x82000014L);
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unsigned int r = csr_readl(0xe0000014L);
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r <<= 8;
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r |= csr_readl(0x82000018L);
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r |= csr_readl(0xe0000018L);
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r <<= 8;
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r |= csr_readl(0x8200001cL);
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r |= csr_readl(0xe000001cL);
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r <<= 8;
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r |= csr_readl(0x82000020L);
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r |= csr_readl(0xe0000020L);
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return r;
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}
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/* litexspi */
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#define CSR_LITEXSPI_BASE 0xe0007800L
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#define CSR_LITEXSPI_BITBANG_ADDR 0xe0007800L
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#define CSR_LITEXSPI_BITBANG_SIZE 1
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static inline unsigned char litexspi_bitbang_read(void) {
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unsigned char r = csr_readl(0xe0007800L);
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return r;
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}
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static inline void litexspi_bitbang_write(unsigned char value) {
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csr_writel(value, 0xe0007800L);
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}
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#define CSR_LITEXSPI_MISO_ADDR 0xe0007804L
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#define CSR_LITEXSPI_MISO_SIZE 1
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static inline unsigned char litexspi_miso_read(void) {
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unsigned char r = csr_readl(0xe0007804L);
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return r;
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}
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#define CSR_LITEXSPI_BITBANG_EN_ADDR 0xe0007808L
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#define CSR_LITEXSPI_BITBANG_EN_SIZE 1
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static inline unsigned char litexspi_bitbang_en_read(void) {
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unsigned char r = csr_readl(0xe0007808L);
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return r;
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}
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static inline void litexspi_bitbang_en_write(unsigned char value) {
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csr_writel(value, 0xe0007808L);
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}
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/* reboot */
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#define CSR_REBOOT_BASE 0x82006000L
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#define CSR_REBOOT_CTRL_ADDR 0x82006000L
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#define CSR_REBOOT_BASE 0xe0006000L
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#define CSR_REBOOT_CTRL_ADDR 0xe0006000L
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#define CSR_REBOOT_CTRL_SIZE 1
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static inline unsigned char reboot_ctrl_read(void) {
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unsigned char r = csr_readl(0x82006000L);
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unsigned char r = csr_readl(0xe0006000L);
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return r;
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}
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static inline void reboot_ctrl_write(unsigned char value) {
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csr_writel(value, 0x82006000L);
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csr_writel(value, 0xe0006000L);
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}
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#define CSR_REBOOT_ADDR_ADDR 0x82006004L
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#define CSR_REBOOT_ADDR_ADDR 0xe0006004L
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#define CSR_REBOOT_ADDR_SIZE 4
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static inline unsigned int reboot_addr_read(void) {
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unsigned int r = csr_readl(0x82006004L);
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unsigned int r = csr_readl(0xe0006004L);
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r <<= 8;
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r |= csr_readl(0x82006008L);
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r |= csr_readl(0xe0006008L);
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r <<= 8;
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r |= csr_readl(0x8200600cL);
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r |= csr_readl(0xe000600cL);
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r <<= 8;
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r |= csr_readl(0x82006010L);
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r |= csr_readl(0xe0006010L);
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return r;
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}
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static inline void reboot_addr_write(unsigned int value) {
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csr_writel(value >> 24, 0x82006004L);
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csr_writel(value >> 16, 0x82006008L);
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csr_writel(value >> 8, 0x8200600cL);
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csr_writel(value, 0x82006010L);
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csr_writel(value >> 24, 0xe0006004L);
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csr_writel(value >> 16, 0xe0006008L);
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csr_writel(value >> 8, 0xe000600cL);
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csr_writel(value, 0xe0006010L);
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}
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/* rgb */
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#define CSR_RGB_BASE 0x82006800L
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#define CSR_RGB_DAT_ADDR 0x82006800L
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#define CSR_RGB_BASE 0xe0006800L
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#define CSR_RGB_DAT_ADDR 0xe0006800L
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#define CSR_RGB_DAT_SIZE 1
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static inline unsigned char rgb_dat_read(void) {
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unsigned char r = csr_readl(0x82006800L);
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unsigned char r = csr_readl(0xe0006800L);
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return r;
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}
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static inline void rgb_dat_write(unsigned char value) {
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csr_writel(value, 0x82006800L);
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csr_writel(value, 0xe0006800L);
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}
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#define CSR_RGB_ADDR_ADDR 0x82006804L
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#define CSR_RGB_ADDR_ADDR 0xe0006804L
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#define CSR_RGB_ADDR_SIZE 1
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static inline unsigned char rgb_addr_read(void) {
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unsigned char r = csr_readl(0x82006804L);
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unsigned char r = csr_readl(0xe0006804L);
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return r;
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}
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static inline void rgb_addr_write(unsigned char value) {
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csr_writel(value, 0x82006804L);
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csr_writel(value, 0xe0006804L);
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}
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#define CSR_RGB_CTRL_ADDR 0x82006808L
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#define CSR_RGB_CTRL_ADDR 0xe0006808L
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#define CSR_RGB_CTRL_SIZE 1
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static inline unsigned char rgb_ctrl_read(void) {
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unsigned char r = csr_readl(0x82006808L);
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unsigned char r = csr_readl(0xe0006808L);
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return r;
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}
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static inline void rgb_ctrl_write(unsigned char value) {
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csr_writel(value, 0x82006808L);
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csr_writel(value, 0xe0006808L);
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}
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#define CSR_RGB_RAW_ADDR 0x8200680cL
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#define CSR_RGB_RAW_ADDR 0xe000680cL
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#define CSR_RGB_RAW_SIZE 1
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static inline unsigned char rgb_raw_read(void) {
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unsigned char r = csr_readl(0x8200680cL);
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unsigned char r = csr_readl(0xe000680cL);
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return r;
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}
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static inline void rgb_raw_write(unsigned char value) {
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csr_writel(value, 0x8200680cL);
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csr_writel(value, 0xe000680cL);
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}
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/* timer0 */
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#define CSR_TIMER0_BASE 0x82002800L
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#define CSR_TIMER0_LOAD_ADDR 0x82002800L
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#define CSR_TIMER0_BASE 0xe0002800L
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#define CSR_TIMER0_LOAD_ADDR 0xe0002800L
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#define CSR_TIMER0_LOAD_SIZE 4
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static inline unsigned int timer0_load_read(void) {
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unsigned int r = csr_readl(0x82002800L);
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unsigned int r = csr_readl(0xe0002800L);
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r <<= 8;
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r |= csr_readl(0x82002804L);
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r |= csr_readl(0xe0002804L);
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r <<= 8;
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r |= csr_readl(0x82002808L);
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r |= csr_readl(0xe0002808L);
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r <<= 8;
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r |= csr_readl(0x8200280cL);
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r |= csr_readl(0xe000280cL);
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return r;
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}
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static inline void timer0_load_write(unsigned int value) {
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csr_writel(value >> 24, 0x82002800L);
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csr_writel(value >> 16, 0x82002804L);
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csr_writel(value >> 8, 0x82002808L);
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csr_writel(value, 0x8200280cL);
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csr_writel(value >> 24, 0xe0002800L);
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csr_writel(value >> 16, 0xe0002804L);
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csr_writel(value >> 8, 0xe0002808L);
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csr_writel(value, 0xe000280cL);
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}
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#define CSR_TIMER0_RELOAD_ADDR 0x82002810L
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#define CSR_TIMER0_RELOAD_ADDR 0xe0002810L
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#define CSR_TIMER0_RELOAD_SIZE 4
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static inline unsigned int timer0_reload_read(void) {
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unsigned int r = csr_readl(0x82002810L);
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unsigned int r = csr_readl(0xe0002810L);
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r <<= 8;
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r |= csr_readl(0x82002814L);
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r |= csr_readl(0xe0002814L);
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r <<= 8;
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r |= csr_readl(0x82002818L);
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r |= csr_readl(0xe0002818L);
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r <<= 8;
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r |= csr_readl(0x8200281cL);
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r |= csr_readl(0xe000281cL);
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return r;
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}
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static inline void timer0_reload_write(unsigned int value) {
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csr_writel(value >> 24, 0x82002810L);
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csr_writel(value >> 16, 0x82002814L);
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csr_writel(value >> 8, 0x82002818L);
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csr_writel(value, 0x8200281cL);
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csr_writel(value >> 24, 0xe0002810L);
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csr_writel(value >> 16, 0xe0002814L);
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csr_writel(value >> 8, 0xe0002818L);
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csr_writel(value, 0xe000281cL);
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}
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#define CSR_TIMER0_EN_ADDR 0x82002820L
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#define CSR_TIMER0_EN_ADDR 0xe0002820L
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#define CSR_TIMER0_EN_SIZE 1
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static inline unsigned char timer0_en_read(void) {
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unsigned char r = csr_readl(0x82002820L);
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unsigned char r = csr_readl(0xe0002820L);
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return r;
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}
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static inline void timer0_en_write(unsigned char value) {
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csr_writel(value, 0x82002820L);
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csr_writel(value, 0xe0002820L);
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}
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#define CSR_TIMER0_UPDATE_VALUE_ADDR 0x82002824L
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#define CSR_TIMER0_UPDATE_VALUE_ADDR 0xe0002824L
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#define CSR_TIMER0_UPDATE_VALUE_SIZE 1
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static inline unsigned char timer0_update_value_read(void) {
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unsigned char r = csr_readl(0x82002824L);
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unsigned char r = csr_readl(0xe0002824L);
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return r;
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}
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static inline void timer0_update_value_write(unsigned char value) {
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csr_writel(value, 0x82002824L);
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csr_writel(value, 0xe0002824L);
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}
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#define CSR_TIMER0_VALUE_ADDR 0x82002828L
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#define CSR_TIMER0_VALUE_ADDR 0xe0002828L
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#define CSR_TIMER0_VALUE_SIZE 4
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static inline unsigned int timer0_value_read(void) {
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unsigned int r = csr_readl(0x82002828L);
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unsigned int r = csr_readl(0xe0002828L);
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r <<= 8;
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r |= csr_readl(0x8200282cL);
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r |= csr_readl(0xe000282cL);
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r <<= 8;
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r |= csr_readl(0x82002830L);
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r |= csr_readl(0xe0002830L);
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r <<= 8;
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r |= csr_readl(0x82002834L);
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r |= csr_readl(0xe0002834L);
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return r;
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}
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#define CSR_TIMER0_EV_STATUS_ADDR 0x82002838L
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#define CSR_TIMER0_EV_STATUS_ADDR 0xe0002838L
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#define CSR_TIMER0_EV_STATUS_SIZE 1
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static inline unsigned char timer0_ev_status_read(void) {
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unsigned char r = csr_readl(0x82002838L);
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unsigned char r = csr_readl(0xe0002838L);
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return r;
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}
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static inline void timer0_ev_status_write(unsigned char value) {
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csr_writel(value, 0x82002838L);
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csr_writel(value, 0xe0002838L);
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}
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#define CSR_TIMER0_EV_PENDING_ADDR 0x8200283cL
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#define CSR_TIMER0_EV_PENDING_ADDR 0xe000283cL
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#define CSR_TIMER0_EV_PENDING_SIZE 1
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static inline unsigned char timer0_ev_pending_read(void) {
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unsigned char r = csr_readl(0x8200283cL);
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unsigned char r = csr_readl(0xe000283cL);
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return r;
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}
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static inline void timer0_ev_pending_write(unsigned char value) {
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csr_writel(value, 0x8200283cL);
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csr_writel(value, 0xe000283cL);
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}
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#define CSR_TIMER0_EV_ENABLE_ADDR 0x82002840L
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#define CSR_TIMER0_EV_ENABLE_ADDR 0xe0002840L
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#define CSR_TIMER0_EV_ENABLE_SIZE 1
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static inline unsigned char timer0_ev_enable_read(void) {
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unsigned char r = csr_readl(0x82002840L);
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unsigned char r = csr_readl(0xe0002840L);
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return r;
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}
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static inline void timer0_ev_enable_write(unsigned char value) {
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csr_writel(value, 0x82002840L);
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csr_writel(value, 0xe0002840L);
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}
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/* touch */
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#define CSR_TOUCH_BASE 0x82005800L
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#define CSR_TOUCH_O_ADDR 0x82005800L
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#define CSR_TOUCH_BASE 0xe0005800L
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#define CSR_TOUCH_O_ADDR 0xe0005800L
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#define CSR_TOUCH_O_SIZE 1
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static inline unsigned char touch_o_read(void) {
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unsigned char r = csr_readl(0x82005800L);
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unsigned char r = csr_readl(0xe0005800L);
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return r;
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}
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static inline void touch_o_write(unsigned char value) {
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csr_writel(value, 0x82005800L);
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csr_writel(value, 0xe0005800L);
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}
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#define CSR_TOUCH_OE_ADDR 0x82005804L
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#define CSR_TOUCH_OE_ADDR 0xe0005804L
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#define CSR_TOUCH_OE_SIZE 1
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static inline unsigned char touch_oe_read(void) {
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unsigned char r = csr_readl(0x82005804L);
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unsigned char r = csr_readl(0xe0005804L);
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return r;
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}
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static inline void touch_oe_write(unsigned char value) {
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csr_writel(value, 0x82005804L);
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csr_writel(value, 0xe0005804L);
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}
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#define CSR_TOUCH_I_ADDR 0x82005808L
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#define CSR_TOUCH_I_ADDR 0xe0005808L
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#define CSR_TOUCH_I_SIZE 1
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static inline unsigned char touch_i_read(void) {
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unsigned char r = csr_readl(0x82005808L);
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unsigned char r = csr_readl(0xe0005808L);
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return r;
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}
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/* usb */
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#define CSR_USB_BASE 0x82004800L
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#define CSR_USB_PULLUP_OUT_ADDR 0x82004800L
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#define CSR_USB_BASE 0xe0004800L
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#define CSR_USB_PULLUP_OUT_ADDR 0xe0004800L
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#define CSR_USB_PULLUP_OUT_SIZE 1
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static inline unsigned char usb_pullup_out_read(void) {
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unsigned char r = csr_readl(0x82004800L);
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unsigned char r = csr_readl(0xe0004800L);
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return r;
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}
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static inline void usb_pullup_out_write(unsigned char value) {
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csr_writel(value, 0x82004800L);
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csr_writel(value, 0xe0004800L);
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}
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||||
#define CSR_USB_EP_0_OUT_EV_STATUS_ADDR 0x82004804L
|
||||
#define CSR_USB_EP_0_OUT_EV_STATUS_ADDR 0xe0004804L
|
||||
#define CSR_USB_EP_0_OUT_EV_STATUS_SIZE 1
|
||||
static inline unsigned char usb_ep_0_out_ev_status_read(void) {
|
||||
unsigned char r = csr_readl(0x82004804L);
|
||||
unsigned char r = csr_readl(0xe0004804L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_0_out_ev_status_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004804L);
|
||||
csr_writel(value, 0xe0004804L);
|
||||
}
|
||||
#define CSR_USB_EP_0_OUT_EV_PENDING_ADDR 0x82004808L
|
||||
#define CSR_USB_EP_0_OUT_EV_PENDING_ADDR 0xe0004808L
|
||||
#define CSR_USB_EP_0_OUT_EV_PENDING_SIZE 1
|
||||
static inline unsigned char usb_ep_0_out_ev_pending_read(void) {
|
||||
unsigned char r = csr_readl(0x82004808L);
|
||||
unsigned char r = csr_readl(0xe0004808L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_0_out_ev_pending_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004808L);
|
||||
csr_writel(value, 0xe0004808L);
|
||||
}
|
||||
#define CSR_USB_EP_0_OUT_EV_ENABLE_ADDR 0x8200480cL
|
||||
#define CSR_USB_EP_0_OUT_EV_ENABLE_ADDR 0xe000480cL
|
||||
#define CSR_USB_EP_0_OUT_EV_ENABLE_SIZE 1
|
||||
static inline unsigned char usb_ep_0_out_ev_enable_read(void) {
|
||||
unsigned char r = csr_readl(0x8200480cL);
|
||||
unsigned char r = csr_readl(0xe000480cL);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_0_out_ev_enable_write(unsigned char value) {
|
||||
csr_writel(value, 0x8200480cL);
|
||||
csr_writel(value, 0xe000480cL);
|
||||
}
|
||||
#define CSR_USB_EP_0_OUT_LAST_TOK_ADDR 0x82004810L
|
||||
#define CSR_USB_EP_0_OUT_LAST_TOK_ADDR 0xe0004810L
|
||||
#define CSR_USB_EP_0_OUT_LAST_TOK_SIZE 1
|
||||
static inline unsigned char usb_ep_0_out_last_tok_read(void) {
|
||||
unsigned char r = csr_readl(0x82004810L);
|
||||
unsigned char r = csr_readl(0xe0004810L);
|
||||
return r;
|
||||
}
|
||||
#define CSR_USB_EP_0_OUT_RESPOND_ADDR 0x82004814L
|
||||
#define CSR_USB_EP_0_OUT_RESPOND_ADDR 0xe0004814L
|
||||
#define CSR_USB_EP_0_OUT_RESPOND_SIZE 1
|
||||
static inline unsigned char usb_ep_0_out_respond_read(void) {
|
||||
unsigned char r = csr_readl(0x82004814L);
|
||||
unsigned char r = csr_readl(0xe0004814L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_0_out_respond_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004814L);
|
||||
csr_writel(value, 0xe0004814L);
|
||||
}
|
||||
#define CSR_USB_EP_0_OUT_DTB_ADDR 0x82004818L
|
||||
#define CSR_USB_EP_0_OUT_DTB_ADDR 0xe0004818L
|
||||
#define CSR_USB_EP_0_OUT_DTB_SIZE 1
|
||||
static inline unsigned char usb_ep_0_out_dtb_read(void) {
|
||||
unsigned char r = csr_readl(0x82004818L);
|
||||
unsigned char r = csr_readl(0xe0004818L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_0_out_dtb_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004818L);
|
||||
csr_writel(value, 0xe0004818L);
|
||||
}
|
||||
#define CSR_USB_EP_0_OUT_OBUF_HEAD_ADDR 0x8200481cL
|
||||
#define CSR_USB_EP_0_OUT_OBUF_HEAD_ADDR 0xe000481cL
|
||||
#define CSR_USB_EP_0_OUT_OBUF_HEAD_SIZE 1
|
||||
static inline unsigned char usb_ep_0_out_obuf_head_read(void) {
|
||||
unsigned char r = csr_readl(0x8200481cL);
|
||||
unsigned char r = csr_readl(0xe000481cL);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_0_out_obuf_head_write(unsigned char value) {
|
||||
csr_writel(value, 0x8200481cL);
|
||||
csr_writel(value, 0xe000481cL);
|
||||
}
|
||||
#define CSR_USB_EP_0_OUT_OBUF_EMPTY_ADDR 0x82004820L
|
||||
#define CSR_USB_EP_0_OUT_OBUF_EMPTY_ADDR 0xe0004820L
|
||||
#define CSR_USB_EP_0_OUT_OBUF_EMPTY_SIZE 1
|
||||
static inline unsigned char usb_ep_0_out_obuf_empty_read(void) {
|
||||
unsigned char r = csr_readl(0x82004820L);
|
||||
unsigned char r = csr_readl(0xe0004820L);
|
||||
return r;
|
||||
}
|
||||
#define CSR_USB_EP_0_IN_EV_STATUS_ADDR 0x82004824L
|
||||
#define CSR_USB_EP_0_IN_EV_STATUS_ADDR 0xe0004824L
|
||||
#define CSR_USB_EP_0_IN_EV_STATUS_SIZE 1
|
||||
static inline unsigned char usb_ep_0_in_ev_status_read(void) {
|
||||
unsigned char r = csr_readl(0x82004824L);
|
||||
unsigned char r = csr_readl(0xe0004824L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_0_in_ev_status_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004824L);
|
||||
csr_writel(value, 0xe0004824L);
|
||||
}
|
||||
#define CSR_USB_EP_0_IN_EV_PENDING_ADDR 0x82004828L
|
||||
#define CSR_USB_EP_0_IN_EV_PENDING_ADDR 0xe0004828L
|
||||
#define CSR_USB_EP_0_IN_EV_PENDING_SIZE 1
|
||||
static inline unsigned char usb_ep_0_in_ev_pending_read(void) {
|
||||
unsigned char r = csr_readl(0x82004828L);
|
||||
unsigned char r = csr_readl(0xe0004828L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_0_in_ev_pending_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004828L);
|
||||
csr_writel(value, 0xe0004828L);
|
||||
}
|
||||
#define CSR_USB_EP_0_IN_EV_ENABLE_ADDR 0x8200482cL
|
||||
#define CSR_USB_EP_0_IN_EV_ENABLE_ADDR 0xe000482cL
|
||||
#define CSR_USB_EP_0_IN_EV_ENABLE_SIZE 1
|
||||
static inline unsigned char usb_ep_0_in_ev_enable_read(void) {
|
||||
unsigned char r = csr_readl(0x8200482cL);
|
||||
unsigned char r = csr_readl(0xe000482cL);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_0_in_ev_enable_write(unsigned char value) {
|
||||
csr_writel(value, 0x8200482cL);
|
||||
csr_writel(value, 0xe000482cL);
|
||||
}
|
||||
#define CSR_USB_EP_0_IN_LAST_TOK_ADDR 0x82004830L
|
||||
#define CSR_USB_EP_0_IN_LAST_TOK_ADDR 0xe0004830L
|
||||
#define CSR_USB_EP_0_IN_LAST_TOK_SIZE 1
|
||||
static inline unsigned char usb_ep_0_in_last_tok_read(void) {
|
||||
unsigned char r = csr_readl(0x82004830L);
|
||||
unsigned char r = csr_readl(0xe0004830L);
|
||||
return r;
|
||||
}
|
||||
#define CSR_USB_EP_0_IN_RESPOND_ADDR 0x82004834L
|
||||
#define CSR_USB_EP_0_IN_RESPOND_ADDR 0xe0004834L
|
||||
#define CSR_USB_EP_0_IN_RESPOND_SIZE 1
|
||||
static inline unsigned char usb_ep_0_in_respond_read(void) {
|
||||
unsigned char r = csr_readl(0x82004834L);
|
||||
unsigned char r = csr_readl(0xe0004834L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_0_in_respond_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004834L);
|
||||
csr_writel(value, 0xe0004834L);
|
||||
}
|
||||
#define CSR_USB_EP_0_IN_DTB_ADDR 0x82004838L
|
||||
#define CSR_USB_EP_0_IN_DTB_ADDR 0xe0004838L
|
||||
#define CSR_USB_EP_0_IN_DTB_SIZE 1
|
||||
static inline unsigned char usb_ep_0_in_dtb_read(void) {
|
||||
unsigned char r = csr_readl(0x82004838L);
|
||||
unsigned char r = csr_readl(0xe0004838L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_0_in_dtb_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004838L);
|
||||
csr_writel(value, 0xe0004838L);
|
||||
}
|
||||
#define CSR_USB_EP_0_IN_IBUF_HEAD_ADDR 0x8200483cL
|
||||
#define CSR_USB_EP_0_IN_IBUF_HEAD_ADDR 0xe000483cL
|
||||
#define CSR_USB_EP_0_IN_IBUF_HEAD_SIZE 1
|
||||
static inline unsigned char usb_ep_0_in_ibuf_head_read(void) {
|
||||
unsigned char r = csr_readl(0x8200483cL);
|
||||
unsigned char r = csr_readl(0xe000483cL);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_0_in_ibuf_head_write(unsigned char value) {
|
||||
csr_writel(value, 0x8200483cL);
|
||||
csr_writel(value, 0xe000483cL);
|
||||
}
|
||||
#define CSR_USB_EP_0_IN_IBUF_EMPTY_ADDR 0x82004840L
|
||||
#define CSR_USB_EP_0_IN_IBUF_EMPTY_ADDR 0xe0004840L
|
||||
#define CSR_USB_EP_0_IN_IBUF_EMPTY_SIZE 1
|
||||
static inline unsigned char usb_ep_0_in_ibuf_empty_read(void) {
|
||||
unsigned char r = csr_readl(0x82004840L);
|
||||
unsigned char r = csr_readl(0xe0004840L);
|
||||
return r;
|
||||
}
|
||||
#define CSR_USB_EP_1_IN_EV_STATUS_ADDR 0x82004844L
|
||||
#define CSR_USB_EP_1_IN_EV_STATUS_ADDR 0xe0004844L
|
||||
#define CSR_USB_EP_1_IN_EV_STATUS_SIZE 1
|
||||
static inline unsigned char usb_ep_1_in_ev_status_read(void) {
|
||||
unsigned char r = csr_readl(0x82004844L);
|
||||
unsigned char r = csr_readl(0xe0004844L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_1_in_ev_status_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004844L);
|
||||
csr_writel(value, 0xe0004844L);
|
||||
}
|
||||
#define CSR_USB_EP_1_IN_EV_PENDING_ADDR 0x82004848L
|
||||
#define CSR_USB_EP_1_IN_EV_PENDING_ADDR 0xe0004848L
|
||||
#define CSR_USB_EP_1_IN_EV_PENDING_SIZE 1
|
||||
static inline unsigned char usb_ep_1_in_ev_pending_read(void) {
|
||||
unsigned char r = csr_readl(0x82004848L);
|
||||
unsigned char r = csr_readl(0xe0004848L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_1_in_ev_pending_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004848L);
|
||||
csr_writel(value, 0xe0004848L);
|
||||
}
|
||||
#define CSR_USB_EP_1_IN_EV_ENABLE_ADDR 0x8200484cL
|
||||
#define CSR_USB_EP_1_IN_EV_ENABLE_ADDR 0xe000484cL
|
||||
#define CSR_USB_EP_1_IN_EV_ENABLE_SIZE 1
|
||||
static inline unsigned char usb_ep_1_in_ev_enable_read(void) {
|
||||
unsigned char r = csr_readl(0x8200484cL);
|
||||
unsigned char r = csr_readl(0xe000484cL);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_1_in_ev_enable_write(unsigned char value) {
|
||||
csr_writel(value, 0x8200484cL);
|
||||
csr_writel(value, 0xe000484cL);
|
||||
}
|
||||
#define CSR_USB_EP_1_IN_LAST_TOK_ADDR 0x82004850L
|
||||
#define CSR_USB_EP_1_IN_LAST_TOK_ADDR 0xe0004850L
|
||||
#define CSR_USB_EP_1_IN_LAST_TOK_SIZE 1
|
||||
static inline unsigned char usb_ep_1_in_last_tok_read(void) {
|
||||
unsigned char r = csr_readl(0x82004850L);
|
||||
unsigned char r = csr_readl(0xe0004850L);
|
||||
return r;
|
||||
}
|
||||
#define CSR_USB_EP_1_IN_RESPOND_ADDR 0x82004854L
|
||||
#define CSR_USB_EP_1_IN_RESPOND_ADDR 0xe0004854L
|
||||
#define CSR_USB_EP_1_IN_RESPOND_SIZE 1
|
||||
static inline unsigned char usb_ep_1_in_respond_read(void) {
|
||||
unsigned char r = csr_readl(0x82004854L);
|
||||
unsigned char r = csr_readl(0xe0004854L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_1_in_respond_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004854L);
|
||||
csr_writel(value, 0xe0004854L);
|
||||
}
|
||||
#define CSR_USB_EP_1_IN_DTB_ADDR 0x82004858L
|
||||
#define CSR_USB_EP_1_IN_DTB_ADDR 0xe0004858L
|
||||
#define CSR_USB_EP_1_IN_DTB_SIZE 1
|
||||
static inline unsigned char usb_ep_1_in_dtb_read(void) {
|
||||
unsigned char r = csr_readl(0x82004858L);
|
||||
unsigned char r = csr_readl(0xe0004858L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_1_in_dtb_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004858L);
|
||||
csr_writel(value, 0xe0004858L);
|
||||
}
|
||||
#define CSR_USB_EP_1_IN_IBUF_HEAD_ADDR 0x8200485cL
|
||||
#define CSR_USB_EP_1_IN_IBUF_HEAD_ADDR 0xe000485cL
|
||||
#define CSR_USB_EP_1_IN_IBUF_HEAD_SIZE 1
|
||||
static inline unsigned char usb_ep_1_in_ibuf_head_read(void) {
|
||||
unsigned char r = csr_readl(0x8200485cL);
|
||||
unsigned char r = csr_readl(0xe000485cL);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_1_in_ibuf_head_write(unsigned char value) {
|
||||
csr_writel(value, 0x8200485cL);
|
||||
csr_writel(value, 0xe000485cL);
|
||||
}
|
||||
#define CSR_USB_EP_1_IN_IBUF_EMPTY_ADDR 0x82004860L
|
||||
#define CSR_USB_EP_1_IN_IBUF_EMPTY_ADDR 0xe0004860L
|
||||
#define CSR_USB_EP_1_IN_IBUF_EMPTY_SIZE 1
|
||||
static inline unsigned char usb_ep_1_in_ibuf_empty_read(void) {
|
||||
unsigned char r = csr_readl(0x82004860L);
|
||||
unsigned char r = csr_readl(0xe0004860L);
|
||||
return r;
|
||||
}
|
||||
#define CSR_USB_EP_2_OUT_EV_STATUS_ADDR 0x82004864L
|
||||
#define CSR_USB_EP_2_OUT_EV_STATUS_ADDR 0xe0004864L
|
||||
#define CSR_USB_EP_2_OUT_EV_STATUS_SIZE 1
|
||||
static inline unsigned char usb_ep_2_out_ev_status_read(void) {
|
||||
unsigned char r = csr_readl(0x82004864L);
|
||||
unsigned char r = csr_readl(0xe0004864L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_2_out_ev_status_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004864L);
|
||||
csr_writel(value, 0xe0004864L);
|
||||
}
|
||||
#define CSR_USB_EP_2_OUT_EV_PENDING_ADDR 0x82004868L
|
||||
#define CSR_USB_EP_2_OUT_EV_PENDING_ADDR 0xe0004868L
|
||||
#define CSR_USB_EP_2_OUT_EV_PENDING_SIZE 1
|
||||
static inline unsigned char usb_ep_2_out_ev_pending_read(void) {
|
||||
unsigned char r = csr_readl(0x82004868L);
|
||||
unsigned char r = csr_readl(0xe0004868L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_2_out_ev_pending_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004868L);
|
||||
csr_writel(value, 0xe0004868L);
|
||||
}
|
||||
#define CSR_USB_EP_2_OUT_EV_ENABLE_ADDR 0x8200486cL
|
||||
#define CSR_USB_EP_2_OUT_EV_ENABLE_ADDR 0xe000486cL
|
||||
#define CSR_USB_EP_2_OUT_EV_ENABLE_SIZE 1
|
||||
static inline unsigned char usb_ep_2_out_ev_enable_read(void) {
|
||||
unsigned char r = csr_readl(0x8200486cL);
|
||||
unsigned char r = csr_readl(0xe000486cL);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_2_out_ev_enable_write(unsigned char value) {
|
||||
csr_writel(value, 0x8200486cL);
|
||||
csr_writel(value, 0xe000486cL);
|
||||
}
|
||||
#define CSR_USB_EP_2_OUT_LAST_TOK_ADDR 0x82004870L
|
||||
#define CSR_USB_EP_2_OUT_LAST_TOK_ADDR 0xe0004870L
|
||||
#define CSR_USB_EP_2_OUT_LAST_TOK_SIZE 1
|
||||
static inline unsigned char usb_ep_2_out_last_tok_read(void) {
|
||||
unsigned char r = csr_readl(0x82004870L);
|
||||
unsigned char r = csr_readl(0xe0004870L);
|
||||
return r;
|
||||
}
|
||||
#define CSR_USB_EP_2_OUT_RESPOND_ADDR 0x82004874L
|
||||
#define CSR_USB_EP_2_OUT_RESPOND_ADDR 0xe0004874L
|
||||
#define CSR_USB_EP_2_OUT_RESPOND_SIZE 1
|
||||
static inline unsigned char usb_ep_2_out_respond_read(void) {
|
||||
unsigned char r = csr_readl(0x82004874L);
|
||||
unsigned char r = csr_readl(0xe0004874L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_2_out_respond_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004874L);
|
||||
csr_writel(value, 0xe0004874L);
|
||||
}
|
||||
#define CSR_USB_EP_2_OUT_DTB_ADDR 0x82004878L
|
||||
#define CSR_USB_EP_2_OUT_DTB_ADDR 0xe0004878L
|
||||
#define CSR_USB_EP_2_OUT_DTB_SIZE 1
|
||||
static inline unsigned char usb_ep_2_out_dtb_read(void) {
|
||||
unsigned char r = csr_readl(0x82004878L);
|
||||
unsigned char r = csr_readl(0xe0004878L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_2_out_dtb_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004878L);
|
||||
csr_writel(value, 0xe0004878L);
|
||||
}
|
||||
#define CSR_USB_EP_2_OUT_OBUF_HEAD_ADDR 0x8200487cL
|
||||
#define CSR_USB_EP_2_OUT_OBUF_HEAD_ADDR 0xe000487cL
|
||||
#define CSR_USB_EP_2_OUT_OBUF_HEAD_SIZE 1
|
||||
static inline unsigned char usb_ep_2_out_obuf_head_read(void) {
|
||||
unsigned char r = csr_readl(0x8200487cL);
|
||||
unsigned char r = csr_readl(0xe000487cL);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_2_out_obuf_head_write(unsigned char value) {
|
||||
csr_writel(value, 0x8200487cL);
|
||||
csr_writel(value, 0xe000487cL);
|
||||
}
|
||||
#define CSR_USB_EP_2_OUT_OBUF_EMPTY_ADDR 0x82004880L
|
||||
#define CSR_USB_EP_2_OUT_OBUF_EMPTY_ADDR 0xe0004880L
|
||||
#define CSR_USB_EP_2_OUT_OBUF_EMPTY_SIZE 1
|
||||
static inline unsigned char usb_ep_2_out_obuf_empty_read(void) {
|
||||
unsigned char r = csr_readl(0x82004880L);
|
||||
unsigned char r = csr_readl(0xe0004880L);
|
||||
return r;
|
||||
}
|
||||
#define CSR_USB_EP_2_IN_EV_STATUS_ADDR 0x82004884L
|
||||
#define CSR_USB_EP_2_IN_EV_STATUS_ADDR 0xe0004884L
|
||||
#define CSR_USB_EP_2_IN_EV_STATUS_SIZE 1
|
||||
static inline unsigned char usb_ep_2_in_ev_status_read(void) {
|
||||
unsigned char r = csr_readl(0x82004884L);
|
||||
unsigned char r = csr_readl(0xe0004884L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_2_in_ev_status_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004884L);
|
||||
csr_writel(value, 0xe0004884L);
|
||||
}
|
||||
#define CSR_USB_EP_2_IN_EV_PENDING_ADDR 0x82004888L
|
||||
#define CSR_USB_EP_2_IN_EV_PENDING_ADDR 0xe0004888L
|
||||
#define CSR_USB_EP_2_IN_EV_PENDING_SIZE 1
|
||||
static inline unsigned char usb_ep_2_in_ev_pending_read(void) {
|
||||
unsigned char r = csr_readl(0x82004888L);
|
||||
unsigned char r = csr_readl(0xe0004888L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_2_in_ev_pending_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004888L);
|
||||
csr_writel(value, 0xe0004888L);
|
||||
}
|
||||
#define CSR_USB_EP_2_IN_EV_ENABLE_ADDR 0x8200488cL
|
||||
#define CSR_USB_EP_2_IN_EV_ENABLE_ADDR 0xe000488cL
|
||||
#define CSR_USB_EP_2_IN_EV_ENABLE_SIZE 1
|
||||
static inline unsigned char usb_ep_2_in_ev_enable_read(void) {
|
||||
unsigned char r = csr_readl(0x8200488cL);
|
||||
unsigned char r = csr_readl(0xe000488cL);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_2_in_ev_enable_write(unsigned char value) {
|
||||
csr_writel(value, 0x8200488cL);
|
||||
csr_writel(value, 0xe000488cL);
|
||||
}
|
||||
#define CSR_USB_EP_2_IN_LAST_TOK_ADDR 0x82004890L
|
||||
#define CSR_USB_EP_2_IN_LAST_TOK_ADDR 0xe0004890L
|
||||
#define CSR_USB_EP_2_IN_LAST_TOK_SIZE 1
|
||||
static inline unsigned char usb_ep_2_in_last_tok_read(void) {
|
||||
unsigned char r = csr_readl(0x82004890L);
|
||||
unsigned char r = csr_readl(0xe0004890L);
|
||||
return r;
|
||||
}
|
||||
#define CSR_USB_EP_2_IN_RESPOND_ADDR 0x82004894L
|
||||
#define CSR_USB_EP_2_IN_RESPOND_ADDR 0xe0004894L
|
||||
#define CSR_USB_EP_2_IN_RESPOND_SIZE 1
|
||||
static inline unsigned char usb_ep_2_in_respond_read(void) {
|
||||
unsigned char r = csr_readl(0x82004894L);
|
||||
unsigned char r = csr_readl(0xe0004894L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_2_in_respond_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004894L);
|
||||
csr_writel(value, 0xe0004894L);
|
||||
}
|
||||
#define CSR_USB_EP_2_IN_DTB_ADDR 0x82004898L
|
||||
#define CSR_USB_EP_2_IN_DTB_ADDR 0xe0004898L
|
||||
#define CSR_USB_EP_2_IN_DTB_SIZE 1
|
||||
static inline unsigned char usb_ep_2_in_dtb_read(void) {
|
||||
unsigned char r = csr_readl(0x82004898L);
|
||||
unsigned char r = csr_readl(0xe0004898L);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_2_in_dtb_write(unsigned char value) {
|
||||
csr_writel(value, 0x82004898L);
|
||||
csr_writel(value, 0xe0004898L);
|
||||
}
|
||||
#define CSR_USB_EP_2_IN_IBUF_HEAD_ADDR 0x8200489cL
|
||||
#define CSR_USB_EP_2_IN_IBUF_HEAD_ADDR 0xe000489cL
|
||||
#define CSR_USB_EP_2_IN_IBUF_HEAD_SIZE 1
|
||||
static inline unsigned char usb_ep_2_in_ibuf_head_read(void) {
|
||||
unsigned char r = csr_readl(0x8200489cL);
|
||||
unsigned char r = csr_readl(0xe000489cL);
|
||||
return r;
|
||||
}
|
||||
static inline void usb_ep_2_in_ibuf_head_write(unsigned char value) {
|
||||
csr_writel(value, 0x8200489cL);
|
||||
csr_writel(value, 0xe000489cL);
|
||||
}
|
||||
#define CSR_USB_EP_2_IN_IBUF_EMPTY_ADDR 0x820048a0L
|
||||
#define CSR_USB_EP_2_IN_IBUF_EMPTY_ADDR 0xe00048a0L
|
||||
#define CSR_USB_EP_2_IN_IBUF_EMPTY_SIZE 1
|
||||
static inline unsigned char usb_ep_2_in_ibuf_empty_read(void) {
|
||||
unsigned char r = csr_readl(0x820048a0L);
|
||||
unsigned char r = csr_readl(0xe00048a0L);
|
||||
return r;
|
||||
}
|
||||
|
||||
/* version */
|
||||
#define CSR_VERSION_BASE 0x82007000L
|
||||
#define CSR_VERSION_MAJOR_ADDR 0x82007000L
|
||||
#define CSR_VERSION_BASE 0xe0007000L
|
||||
#define CSR_VERSION_MAJOR_ADDR 0xe0007000L
|
||||
#define CSR_VERSION_MAJOR_SIZE 1
|
||||
static inline unsigned char version_major_read(void) {
|
||||
unsigned char r = csr_readl(0x82007000L);
|
||||
unsigned char r = csr_readl(0xe0007000L);
|
||||
return r;
|
||||
}
|
||||
#define CSR_VERSION_MINOR_ADDR 0x82007004L
|
||||
#define CSR_VERSION_MINOR_ADDR 0xe0007004L
|
||||
#define CSR_VERSION_MINOR_SIZE 1
|
||||
static inline unsigned char version_minor_read(void) {
|
||||
unsigned char r = csr_readl(0x82007004L);
|
||||
unsigned char r = csr_readl(0xe0007004L);
|
||||
return r;
|
||||
}
|
||||
#define CSR_VERSION_REVISION_ADDR 0x82007008L
|
||||
#define CSR_VERSION_REVISION_ADDR 0xe0007008L
|
||||
#define CSR_VERSION_REVISION_SIZE 1
|
||||
static inline unsigned char version_revision_read(void) {
|
||||
unsigned char r = csr_readl(0x82007008L);
|
||||
unsigned char r = csr_readl(0xe0007008L);
|
||||
return r;
|
||||
}
|
||||
#define CSR_VERSION_GITREV_ADDR 0x8200700cL
|
||||
#define CSR_VERSION_GITREV_ADDR 0xe000700cL
|
||||
#define CSR_VERSION_GITREV_SIZE 4
|
||||
static inline unsigned int version_gitrev_read(void) {
|
||||
unsigned int r = csr_readl(0x8200700cL);
|
||||
unsigned int r = csr_readl(0xe000700cL);
|
||||
r <<= 8;
|
||||
r |= csr_readl(0x82007010L);
|
||||
r |= csr_readl(0xe0007010L);
|
||||
r <<= 8;
|
||||
r |= csr_readl(0x82007014L);
|
||||
r |= csr_readl(0xe0007014L);
|
||||
r <<= 8;
|
||||
r |= csr_readl(0x82007018L);
|
||||
r |= csr_readl(0xe0007018L);
|
||||
return r;
|
||||
}
|
||||
#define CSR_VERSION_GITEXTRA_ADDR 0x8200701cL
|
||||
#define CSR_VERSION_GITEXTRA_ADDR 0xe000701cL
|
||||
#define CSR_VERSION_GITEXTRA_SIZE 2
|
||||
static inline unsigned short int version_gitextra_read(void) {
|
||||
unsigned short int r = csr_readl(0x8200701cL);
|
||||
unsigned short int r = csr_readl(0xe000701cL);
|
||||
r <<= 8;
|
||||
r |= csr_readl(0x82007020L);
|
||||
r |= csr_readl(0xe0007020L);
|
||||
return r;
|
||||
}
|
||||
#define CSR_VERSION_DIRTY_ADDR 0x82007024L
|
||||
#define CSR_VERSION_DIRTY_ADDR 0xe0007024L
|
||||
#define CSR_VERSION_DIRTY_SIZE 1
|
||||
static inline unsigned char version_dirty_read(void) {
|
||||
unsigned char r = csr_readl(0x82007024L);
|
||||
unsigned char r = csr_readl(0xe0007024L);
|
||||
return r;
|
||||
}
|
||||
#define CSR_VERSION_MODEL_ADDR 0x82007028L
|
||||
#define CSR_VERSION_MODEL_ADDR 0xe0007028L
|
||||
#define CSR_VERSION_MODEL_SIZE 1
|
||||
static inline unsigned char version_model_read(void) {
|
||||
unsigned char r = csr_readl(0x82007028L);
|
||||
unsigned char r = csr_readl(0xe0007028L);
|
||||
return r;
|
||||
}
|
||||
|
||||
@ -653,14 +680,6 @@ static inline int timer0_interrupt_read(void) {
|
||||
static inline int usb_interrupt_read(void) {
|
||||
return 3;
|
||||
}
|
||||
#define CSR_DATA_WIDTH 8
|
||||
static inline int csr_data_width_read(void) {
|
||||
return 8;
|
||||
}
|
||||
#define SYSTEM_CLOCK_FREQUENCY 12000000
|
||||
static inline int system_clock_frequency_read(void) {
|
||||
return 12000000;
|
||||
}
|
||||
#define CONFIG_BITSTREAM_SYNC_HEADER1 2123999870
|
||||
static inline int config_bitstream_sync_header1_read(void) {
|
||||
return 2123999870;
|
||||
@ -681,6 +700,10 @@ static inline int config_cpu_reset_addr_read(void) {
|
||||
static inline const char * config_cpu_type_read(void) {
|
||||
return "VEXRISCV";
|
||||
}
|
||||
#define CONFIG_CSR_ALIGNMENT 32
|
||||
static inline int config_csr_alignment_read(void) {
|
||||
return 32;
|
||||
}
|
||||
#define CONFIG_CSR_DATA_WIDTH 8
|
||||
static inline int config_csr_data_width_read(void) {
|
||||
return 8;
|
||||
|
||||
@ -1,11 +1,14 @@
|
||||
//--------------------------------------------------------------------------------
|
||||
// Auto-generated by Migen (ae42105) & LiteX (6a975e58) on 2019-07-08 16:22:23
|
||||
// Auto-generated by Migen (ae42105) & LiteX (ccbf1418) on 2019-07-09 19:02:56
|
||||
//--------------------------------------------------------------------------------
|
||||
#ifndef __GENERATED_MEM_H
|
||||
#define __GENERATED_MEM_H
|
||||
|
||||
#define CSR_BASE 0x02000000L
|
||||
#define CSR_SIZE 0x10000000
|
||||
#define CSR_BASE 0x60000000L
|
||||
#define CSR_SIZE 0x00010000
|
||||
|
||||
#define VEXRISCV_DEBUG_BASE 0xf00f0000L
|
||||
#define VEXRISCV_DEBUG_SIZE 0x00000100
|
||||
|
||||
#define SRAM_BASE 0x10000000L
|
||||
#define SRAM_SIZE 0x00020000
|
||||
@ -13,6 +16,9 @@
|
||||
#define ROM_BASE 0x00000000L
|
||||
#define ROM_SIZE 0x00002000
|
||||
|
||||
#define SPIFLASH_BASE 0x20000000L
|
||||
#define SPIFLASH_SIZE 0x00200000
|
||||
|
||||
#define SHADOW_BASE 0x80000000L
|
||||
|
||||
#endif
|
||||
|
||||
@ -1 +1 @@
|
||||
OUTPUT_FORMAT("elf32-littleriscv")
|
||||
OUTPUT_FORMAT("elf32-littleriscv")
|
||||
|
||||
@ -1,4 +1,7 @@
|
||||
MEMORY {
|
||||
sram : ORIGIN = 0x01000000, LENGTH = 4096
|
||||
rom : ORIGIN = 0x00000000, LENGTH = 0x00002000
|
||||
}
|
||||
MEMORY {
|
||||
csr : ORIGIN = 0x60000000, LENGTH = 0x00010000
|
||||
vexriscv_debug : ORIGIN = 0xf00f0000, LENGTH = 0x00000100
|
||||
sram : ORIGIN = 0x10000000, LENGTH = 0x00020000
|
||||
rom : ORIGIN = 0x00000000, LENGTH = 0x00002000
|
||||
spiflash : ORIGIN = 0x20000000, LENGTH = 0x00200000
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user