mirror of
https://github.com/im-tomu/foboot.git
synced 2024-09-20 02:40:09 +00:00
sw: use latest csr.h file
Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
parent
cf8273d8c1
commit
a9a75fb02f
@ -1,5 +1,5 @@
|
|||||||
//--------------------------------------------------------------------------------
|
//--------------------------------------------------------------------------------
|
||||||
// Auto-generated by Migen (ae42105) & LiteX (eaf84b85) on 2019-07-21 12:28:47
|
// Auto-generated by Migen (ae42105) & LiteX (3a72688b) on 2019-09-11 10:15:34
|
||||||
//--------------------------------------------------------------------------------
|
//--------------------------------------------------------------------------------
|
||||||
#ifndef __GENERATED_CSR_H
|
#ifndef __GENERATED_CSR_H
|
||||||
#define __GENERATED_CSR_H
|
#define __GENERATED_CSR_H
|
||||||
@ -323,336 +323,207 @@ static inline unsigned char usb_pullup_out_read(void) {
|
|||||||
static inline void usb_pullup_out_write(unsigned char value) {
|
static inline void usb_pullup_out_write(unsigned char value) {
|
||||||
csr_writel(value, 0xe0004800L);
|
csr_writel(value, 0xe0004800L);
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_0_OUT_EV_STATUS_ADDR 0xe0004804L
|
#define CSR_USB_SETUP_DATA_ADDR 0xe0004804L
|
||||||
#define CSR_USB_EP_0_OUT_EV_STATUS_SIZE 1
|
#define CSR_USB_SETUP_DATA_SIZE 1
|
||||||
static inline unsigned char usb_ep_0_out_ev_status_read(void) {
|
static inline unsigned char usb_setup_data_read(void) {
|
||||||
unsigned char r = csr_readl(0xe0004804L);
|
unsigned char r = csr_readl(0xe0004804L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_0_out_ev_status_write(unsigned char value) {
|
#define CSR_USB_SETUP_STATUS_ADDR 0xe0004808L
|
||||||
csr_writel(value, 0xe0004804L);
|
#define CSR_USB_SETUP_STATUS_SIZE 1
|
||||||
}
|
static inline unsigned char usb_setup_status_read(void) {
|
||||||
#define CSR_USB_EP_0_OUT_EV_PENDING_ADDR 0xe0004808L
|
|
||||||
#define CSR_USB_EP_0_OUT_EV_PENDING_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_0_out_ev_pending_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe0004808L);
|
unsigned char r = csr_readl(0xe0004808L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_0_out_ev_pending_write(unsigned char value) {
|
#define CSR_USB_SETUP_CTRL_ADDR 0xe000480cL
|
||||||
csr_writel(value, 0xe0004808L);
|
#define CSR_USB_SETUP_CTRL_SIZE 1
|
||||||
}
|
static inline unsigned char usb_setup_ctrl_read(void) {
|
||||||
#define CSR_USB_EP_0_OUT_EV_ENABLE_ADDR 0xe000480cL
|
|
||||||
#define CSR_USB_EP_0_OUT_EV_ENABLE_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_0_out_ev_enable_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe000480cL);
|
unsigned char r = csr_readl(0xe000480cL);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_0_out_ev_enable_write(unsigned char value) {
|
static inline void usb_setup_ctrl_write(unsigned char value) {
|
||||||
csr_writel(value, 0xe000480cL);
|
csr_writel(value, 0xe000480cL);
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_0_OUT_LAST_TOK_ADDR 0xe0004810L
|
#define CSR_USB_SETUP_EV_STATUS_ADDR 0xe0004810L
|
||||||
#define CSR_USB_EP_0_OUT_LAST_TOK_SIZE 1
|
#define CSR_USB_SETUP_EV_STATUS_SIZE 1
|
||||||
static inline unsigned char usb_ep_0_out_last_tok_read(void) {
|
static inline unsigned char usb_setup_ev_status_read(void) {
|
||||||
unsigned char r = csr_readl(0xe0004810L);
|
unsigned char r = csr_readl(0xe0004810L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_0_OUT_RESPOND_ADDR 0xe0004814L
|
static inline void usb_setup_ev_status_write(unsigned char value) {
|
||||||
#define CSR_USB_EP_0_OUT_RESPOND_SIZE 1
|
csr_writel(value, 0xe0004810L);
|
||||||
static inline unsigned char usb_ep_0_out_respond_read(void) {
|
}
|
||||||
|
#define CSR_USB_SETUP_EV_PENDING_ADDR 0xe0004814L
|
||||||
|
#define CSR_USB_SETUP_EV_PENDING_SIZE 1
|
||||||
|
static inline unsigned char usb_setup_ev_pending_read(void) {
|
||||||
unsigned char r = csr_readl(0xe0004814L);
|
unsigned char r = csr_readl(0xe0004814L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_0_out_respond_write(unsigned char value) {
|
static inline void usb_setup_ev_pending_write(unsigned char value) {
|
||||||
csr_writel(value, 0xe0004814L);
|
csr_writel(value, 0xe0004814L);
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_0_OUT_DTB_ADDR 0xe0004818L
|
#define CSR_USB_SETUP_EV_ENABLE_ADDR 0xe0004818L
|
||||||
#define CSR_USB_EP_0_OUT_DTB_SIZE 1
|
#define CSR_USB_SETUP_EV_ENABLE_SIZE 1
|
||||||
static inline unsigned char usb_ep_0_out_dtb_read(void) {
|
static inline unsigned char usb_setup_ev_enable_read(void) {
|
||||||
unsigned char r = csr_readl(0xe0004818L);
|
unsigned char r = csr_readl(0xe0004818L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_0_out_dtb_write(unsigned char value) {
|
static inline void usb_setup_ev_enable_write(unsigned char value) {
|
||||||
csr_writel(value, 0xe0004818L);
|
csr_writel(value, 0xe0004818L);
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_0_OUT_OBUF_HEAD_ADDR 0xe000481cL
|
#define CSR_USB_IN_EV_STATUS_ADDR 0xe000481cL
|
||||||
#define CSR_USB_EP_0_OUT_OBUF_HEAD_SIZE 1
|
#define CSR_USB_IN_EV_STATUS_SIZE 1
|
||||||
static inline unsigned char usb_ep_0_out_obuf_head_read(void) {
|
static inline unsigned char usb_in_ev_status_read(void) {
|
||||||
unsigned char r = csr_readl(0xe000481cL);
|
unsigned char r = csr_readl(0xe000481cL);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_0_out_obuf_head_write(unsigned char value) {
|
static inline void usb_in_ev_status_write(unsigned char value) {
|
||||||
csr_writel(value, 0xe000481cL);
|
csr_writel(value, 0xe000481cL);
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_0_OUT_OBUF_EMPTY_ADDR 0xe0004820L
|
#define CSR_USB_IN_EV_PENDING_ADDR 0xe0004820L
|
||||||
#define CSR_USB_EP_0_OUT_OBUF_EMPTY_SIZE 1
|
#define CSR_USB_IN_EV_PENDING_SIZE 1
|
||||||
static inline unsigned char usb_ep_0_out_obuf_empty_read(void) {
|
static inline unsigned char usb_in_ev_pending_read(void) {
|
||||||
unsigned char r = csr_readl(0xe0004820L);
|
unsigned char r = csr_readl(0xe0004820L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_0_IN_EV_STATUS_ADDR 0xe0004824L
|
static inline void usb_in_ev_pending_write(unsigned char value) {
|
||||||
#define CSR_USB_EP_0_IN_EV_STATUS_SIZE 1
|
csr_writel(value, 0xe0004820L);
|
||||||
static inline unsigned char usb_ep_0_in_ev_status_read(void) {
|
}
|
||||||
|
#define CSR_USB_IN_EV_ENABLE_ADDR 0xe0004824L
|
||||||
|
#define CSR_USB_IN_EV_ENABLE_SIZE 1
|
||||||
|
static inline unsigned char usb_in_ev_enable_read(void) {
|
||||||
unsigned char r = csr_readl(0xe0004824L);
|
unsigned char r = csr_readl(0xe0004824L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_0_in_ev_status_write(unsigned char value) {
|
static inline void usb_in_ev_enable_write(unsigned char value) {
|
||||||
csr_writel(value, 0xe0004824L);
|
csr_writel(value, 0xe0004824L);
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_0_IN_EV_PENDING_ADDR 0xe0004828L
|
#define CSR_USB_IN_DATA_ADDR 0xe0004828L
|
||||||
#define CSR_USB_EP_0_IN_EV_PENDING_SIZE 1
|
#define CSR_USB_IN_DATA_SIZE 1
|
||||||
static inline unsigned char usb_ep_0_in_ev_pending_read(void) {
|
static inline unsigned char usb_in_data_read(void) {
|
||||||
unsigned char r = csr_readl(0xe0004828L);
|
unsigned char r = csr_readl(0xe0004828L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_0_in_ev_pending_write(unsigned char value) {
|
static inline void usb_in_data_write(unsigned char value) {
|
||||||
csr_writel(value, 0xe0004828L);
|
csr_writel(value, 0xe0004828L);
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_0_IN_EV_ENABLE_ADDR 0xe000482cL
|
#define CSR_USB_IN_STATUS_ADDR 0xe000482cL
|
||||||
#define CSR_USB_EP_0_IN_EV_ENABLE_SIZE 1
|
#define CSR_USB_IN_STATUS_SIZE 1
|
||||||
static inline unsigned char usb_ep_0_in_ev_enable_read(void) {
|
static inline unsigned char usb_in_status_read(void) {
|
||||||
unsigned char r = csr_readl(0xe000482cL);
|
unsigned char r = csr_readl(0xe000482cL);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_0_in_ev_enable_write(unsigned char value) {
|
#define CSR_USB_IN_CTRL_ADDR 0xe0004830L
|
||||||
csr_writel(value, 0xe000482cL);
|
#define CSR_USB_IN_CTRL_SIZE 1
|
||||||
}
|
static inline unsigned char usb_in_ctrl_read(void) {
|
||||||
#define CSR_USB_EP_0_IN_LAST_TOK_ADDR 0xe0004830L
|
|
||||||
#define CSR_USB_EP_0_IN_LAST_TOK_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_0_in_last_tok_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe0004830L);
|
unsigned char r = csr_readl(0xe0004830L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_0_IN_RESPOND_ADDR 0xe0004834L
|
static inline void usb_in_ctrl_write(unsigned char value) {
|
||||||
#define CSR_USB_EP_0_IN_RESPOND_SIZE 1
|
csr_writel(value, 0xe0004830L);
|
||||||
static inline unsigned char usb_ep_0_in_respond_read(void) {
|
}
|
||||||
|
#define CSR_USB_OUT_EV_STATUS_ADDR 0xe0004834L
|
||||||
|
#define CSR_USB_OUT_EV_STATUS_SIZE 1
|
||||||
|
static inline unsigned char usb_out_ev_status_read(void) {
|
||||||
unsigned char r = csr_readl(0xe0004834L);
|
unsigned char r = csr_readl(0xe0004834L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_0_in_respond_write(unsigned char value) {
|
static inline void usb_out_ev_status_write(unsigned char value) {
|
||||||
csr_writel(value, 0xe0004834L);
|
csr_writel(value, 0xe0004834L);
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_0_IN_DTB_ADDR 0xe0004838L
|
#define CSR_USB_OUT_EV_PENDING_ADDR 0xe0004838L
|
||||||
#define CSR_USB_EP_0_IN_DTB_SIZE 1
|
#define CSR_USB_OUT_EV_PENDING_SIZE 1
|
||||||
static inline unsigned char usb_ep_0_in_dtb_read(void) {
|
static inline unsigned char usb_out_ev_pending_read(void) {
|
||||||
unsigned char r = csr_readl(0xe0004838L);
|
unsigned char r = csr_readl(0xe0004838L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_0_in_dtb_write(unsigned char value) {
|
static inline void usb_out_ev_pending_write(unsigned char value) {
|
||||||
csr_writel(value, 0xe0004838L);
|
csr_writel(value, 0xe0004838L);
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_0_IN_IBUF_HEAD_ADDR 0xe000483cL
|
#define CSR_USB_OUT_EV_ENABLE_ADDR 0xe000483cL
|
||||||
#define CSR_USB_EP_0_IN_IBUF_HEAD_SIZE 1
|
#define CSR_USB_OUT_EV_ENABLE_SIZE 1
|
||||||
static inline unsigned char usb_ep_0_in_ibuf_head_read(void) {
|
static inline unsigned char usb_out_ev_enable_read(void) {
|
||||||
unsigned char r = csr_readl(0xe000483cL);
|
unsigned char r = csr_readl(0xe000483cL);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_0_in_ibuf_head_write(unsigned char value) {
|
static inline void usb_out_ev_enable_write(unsigned char value) {
|
||||||
csr_writel(value, 0xe000483cL);
|
csr_writel(value, 0xe000483cL);
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_0_IN_IBUF_EMPTY_ADDR 0xe0004840L
|
#define CSR_USB_OUT_DATA_ADDR 0xe0004840L
|
||||||
#define CSR_USB_EP_0_IN_IBUF_EMPTY_SIZE 1
|
#define CSR_USB_OUT_DATA_SIZE 1
|
||||||
static inline unsigned char usb_ep_0_in_ibuf_empty_read(void) {
|
static inline unsigned char usb_out_data_read(void) {
|
||||||
unsigned char r = csr_readl(0xe0004840L);
|
unsigned char r = csr_readl(0xe0004840L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_1_IN_EV_STATUS_ADDR 0xe0004844L
|
#define CSR_USB_OUT_STATUS_ADDR 0xe0004844L
|
||||||
#define CSR_USB_EP_1_IN_EV_STATUS_SIZE 1
|
#define CSR_USB_OUT_STATUS_SIZE 1
|
||||||
static inline unsigned char usb_ep_1_in_ev_status_read(void) {
|
static inline unsigned char usb_out_status_read(void) {
|
||||||
unsigned char r = csr_readl(0xe0004844L);
|
unsigned char r = csr_readl(0xe0004844L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_1_in_ev_status_write(unsigned char value) {
|
#define CSR_USB_OUT_CTRL_ADDR 0xe0004848L
|
||||||
csr_writel(value, 0xe0004844L);
|
#define CSR_USB_OUT_CTRL_SIZE 1
|
||||||
}
|
static inline unsigned char usb_out_ctrl_read(void) {
|
||||||
#define CSR_USB_EP_1_IN_EV_PENDING_ADDR 0xe0004848L
|
|
||||||
#define CSR_USB_EP_1_IN_EV_PENDING_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_1_in_ev_pending_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe0004848L);
|
unsigned char r = csr_readl(0xe0004848L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_1_in_ev_pending_write(unsigned char value) {
|
static inline void usb_out_ctrl_write(unsigned char value) {
|
||||||
csr_writel(value, 0xe0004848L);
|
csr_writel(value, 0xe0004848L);
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_1_IN_EV_ENABLE_ADDR 0xe000484cL
|
#define CSR_USB_OUT_STALL_ADDR 0xe000484cL
|
||||||
#define CSR_USB_EP_1_IN_EV_ENABLE_SIZE 1
|
#define CSR_USB_OUT_STALL_SIZE 1
|
||||||
static inline unsigned char usb_ep_1_in_ev_enable_read(void) {
|
static inline unsigned char usb_out_stall_read(void) {
|
||||||
unsigned char r = csr_readl(0xe000484cL);
|
unsigned char r = csr_readl(0xe000484cL);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_1_in_ev_enable_write(unsigned char value) {
|
static inline void usb_out_stall_write(unsigned char value) {
|
||||||
csr_writel(value, 0xe000484cL);
|
csr_writel(value, 0xe000484cL);
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_1_IN_LAST_TOK_ADDR 0xe0004850L
|
#define CSR_USB_ADDRESS_ADDR 0xe0004850L
|
||||||
#define CSR_USB_EP_1_IN_LAST_TOK_SIZE 1
|
#define CSR_USB_ADDRESS_SIZE 1
|
||||||
static inline unsigned char usb_ep_1_in_last_tok_read(void) {
|
static inline unsigned char usb_address_read(void) {
|
||||||
unsigned char r = csr_readl(0xe0004850L);
|
unsigned char r = csr_readl(0xe0004850L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_1_IN_RESPOND_ADDR 0xe0004854L
|
static inline void usb_address_write(unsigned char value) {
|
||||||
#define CSR_USB_EP_1_IN_RESPOND_SIZE 1
|
csr_writel(value, 0xe0004850L);
|
||||||
static inline unsigned char usb_ep_1_in_respond_read(void) {
|
}
|
||||||
|
#define CSR_USB_STAGE_NUM_ADDR 0xe0004854L
|
||||||
|
#define CSR_USB_STAGE_NUM_SIZE 1
|
||||||
|
static inline unsigned char usb_stage_num_read(void) {
|
||||||
unsigned char r = csr_readl(0xe0004854L);
|
unsigned char r = csr_readl(0xe0004854L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_1_in_respond_write(unsigned char value) {
|
#define CSR_USB_LAST_STAGE_NUM_ADDR 0xe0004858L
|
||||||
csr_writel(value, 0xe0004854L);
|
#define CSR_USB_LAST_STAGE_NUM_SIZE 1
|
||||||
}
|
static inline unsigned char usb_last_stage_num_read(void) {
|
||||||
#define CSR_USB_EP_1_IN_DTB_ADDR 0xe0004858L
|
|
||||||
#define CSR_USB_EP_1_IN_DTB_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_1_in_dtb_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe0004858L);
|
unsigned char r = csr_readl(0xe0004858L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_1_in_dtb_write(unsigned char value) {
|
#define CSR_USB_ERROR_COUNT_ADDR 0xe000485cL
|
||||||
csr_writel(value, 0xe0004858L);
|
#define CSR_USB_ERROR_COUNT_SIZE 1
|
||||||
}
|
static inline unsigned char usb_error_count_read(void) {
|
||||||
#define CSR_USB_EP_1_IN_IBUF_HEAD_ADDR 0xe000485cL
|
|
||||||
#define CSR_USB_EP_1_IN_IBUF_HEAD_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_1_in_ibuf_head_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe000485cL);
|
unsigned char r = csr_readl(0xe000485cL);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_1_in_ibuf_head_write(unsigned char value) {
|
#define CSR_USB_TOK_WAITS_ADDR 0xe0004860L
|
||||||
csr_writel(value, 0xe000485cL);
|
#define CSR_USB_TOK_WAITS_SIZE 1
|
||||||
}
|
static inline unsigned char usb_tok_waits_read(void) {
|
||||||
#define CSR_USB_EP_1_IN_IBUF_EMPTY_ADDR 0xe0004860L
|
|
||||||
#define CSR_USB_EP_1_IN_IBUF_EMPTY_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_1_in_ibuf_empty_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe0004860L);
|
unsigned char r = csr_readl(0xe0004860L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
#define CSR_USB_EP_2_OUT_EV_STATUS_ADDR 0xe0004864L
|
#define CSR_USB_STATUS_ADDR 0xe0004864L
|
||||||
#define CSR_USB_EP_2_OUT_EV_STATUS_SIZE 1
|
#define CSR_USB_STATUS_SIZE 1
|
||||||
static inline unsigned char usb_ep_2_out_ev_status_read(void) {
|
static inline unsigned char usb_status_read(void) {
|
||||||
unsigned char r = csr_readl(0xe0004864L);
|
unsigned char r = csr_readl(0xe0004864L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_2_out_ev_status_write(unsigned char value) {
|
#define CSR_USB_INVALID_STATES_ADDR 0xe0004868L
|
||||||
csr_writel(value, 0xe0004864L);
|
#define CSR_USB_INVALID_STATES_SIZE 1
|
||||||
}
|
static inline unsigned char usb_invalid_states_read(void) {
|
||||||
#define CSR_USB_EP_2_OUT_EV_PENDING_ADDR 0xe0004868L
|
|
||||||
#define CSR_USB_EP_2_OUT_EV_PENDING_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_2_out_ev_pending_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe0004868L);
|
unsigned char r = csr_readl(0xe0004868L);
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
static inline void usb_ep_2_out_ev_pending_write(unsigned char value) {
|
|
||||||
csr_writel(value, 0xe0004868L);
|
|
||||||
}
|
|
||||||
#define CSR_USB_EP_2_OUT_EV_ENABLE_ADDR 0xe000486cL
|
|
||||||
#define CSR_USB_EP_2_OUT_EV_ENABLE_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_2_out_ev_enable_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe000486cL);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
static inline void usb_ep_2_out_ev_enable_write(unsigned char value) {
|
|
||||||
csr_writel(value, 0xe000486cL);
|
|
||||||
}
|
|
||||||
#define CSR_USB_EP_2_OUT_LAST_TOK_ADDR 0xe0004870L
|
|
||||||
#define CSR_USB_EP_2_OUT_LAST_TOK_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_2_out_last_tok_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe0004870L);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
#define CSR_USB_EP_2_OUT_RESPOND_ADDR 0xe0004874L
|
|
||||||
#define CSR_USB_EP_2_OUT_RESPOND_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_2_out_respond_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe0004874L);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
static inline void usb_ep_2_out_respond_write(unsigned char value) {
|
|
||||||
csr_writel(value, 0xe0004874L);
|
|
||||||
}
|
|
||||||
#define CSR_USB_EP_2_OUT_DTB_ADDR 0xe0004878L
|
|
||||||
#define CSR_USB_EP_2_OUT_DTB_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_2_out_dtb_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe0004878L);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
static inline void usb_ep_2_out_dtb_write(unsigned char value) {
|
|
||||||
csr_writel(value, 0xe0004878L);
|
|
||||||
}
|
|
||||||
#define CSR_USB_EP_2_OUT_OBUF_HEAD_ADDR 0xe000487cL
|
|
||||||
#define CSR_USB_EP_2_OUT_OBUF_HEAD_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_2_out_obuf_head_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe000487cL);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
static inline void usb_ep_2_out_obuf_head_write(unsigned char value) {
|
|
||||||
csr_writel(value, 0xe000487cL);
|
|
||||||
}
|
|
||||||
#define CSR_USB_EP_2_OUT_OBUF_EMPTY_ADDR 0xe0004880L
|
|
||||||
#define CSR_USB_EP_2_OUT_OBUF_EMPTY_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_2_out_obuf_empty_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe0004880L);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
#define CSR_USB_EP_2_IN_EV_STATUS_ADDR 0xe0004884L
|
|
||||||
#define CSR_USB_EP_2_IN_EV_STATUS_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_2_in_ev_status_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe0004884L);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
static inline void usb_ep_2_in_ev_status_write(unsigned char value) {
|
|
||||||
csr_writel(value, 0xe0004884L);
|
|
||||||
}
|
|
||||||
#define CSR_USB_EP_2_IN_EV_PENDING_ADDR 0xe0004888L
|
|
||||||
#define CSR_USB_EP_2_IN_EV_PENDING_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_2_in_ev_pending_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe0004888L);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
static inline void usb_ep_2_in_ev_pending_write(unsigned char value) {
|
|
||||||
csr_writel(value, 0xe0004888L);
|
|
||||||
}
|
|
||||||
#define CSR_USB_EP_2_IN_EV_ENABLE_ADDR 0xe000488cL
|
|
||||||
#define CSR_USB_EP_2_IN_EV_ENABLE_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_2_in_ev_enable_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe000488cL);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
static inline void usb_ep_2_in_ev_enable_write(unsigned char value) {
|
|
||||||
csr_writel(value, 0xe000488cL);
|
|
||||||
}
|
|
||||||
#define CSR_USB_EP_2_IN_LAST_TOK_ADDR 0xe0004890L
|
|
||||||
#define CSR_USB_EP_2_IN_LAST_TOK_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_2_in_last_tok_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe0004890L);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
#define CSR_USB_EP_2_IN_RESPOND_ADDR 0xe0004894L
|
|
||||||
#define CSR_USB_EP_2_IN_RESPOND_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_2_in_respond_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe0004894L);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
static inline void usb_ep_2_in_respond_write(unsigned char value) {
|
|
||||||
csr_writel(value, 0xe0004894L);
|
|
||||||
}
|
|
||||||
#define CSR_USB_EP_2_IN_DTB_ADDR 0xe0004898L
|
|
||||||
#define CSR_USB_EP_2_IN_DTB_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_2_in_dtb_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe0004898L);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
static inline void usb_ep_2_in_dtb_write(unsigned char value) {
|
|
||||||
csr_writel(value, 0xe0004898L);
|
|
||||||
}
|
|
||||||
#define CSR_USB_EP_2_IN_IBUF_HEAD_ADDR 0xe000489cL
|
|
||||||
#define CSR_USB_EP_2_IN_IBUF_HEAD_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_2_in_ibuf_head_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe000489cL);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
static inline void usb_ep_2_in_ibuf_head_write(unsigned char value) {
|
|
||||||
csr_writel(value, 0xe000489cL);
|
|
||||||
}
|
|
||||||
#define CSR_USB_EP_2_IN_IBUF_EMPTY_ADDR 0xe00048a0L
|
|
||||||
#define CSR_USB_EP_2_IN_IBUF_EMPTY_SIZE 1
|
|
||||||
static inline unsigned char usb_ep_2_in_ibuf_empty_read(void) {
|
|
||||||
unsigned char r = csr_readl(0xe00048a0L);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* version */
|
/* version */
|
||||||
#define CSR_VERSION_BASE 0xe0007000L
|
#define CSR_VERSION_BASE 0xe0007000L
|
||||||
@ -716,6 +587,18 @@ static inline int timer0_interrupt_read(void) {
|
|||||||
static inline int usb_interrupt_read(void) {
|
static inline int usb_interrupt_read(void) {
|
||||||
return 3;
|
return 3;
|
||||||
}
|
}
|
||||||
|
#define CSR_DATA_WIDTH 8
|
||||||
|
static inline int csr_data_width_read(void) {
|
||||||
|
return 8;
|
||||||
|
}
|
||||||
|
#define SYSTEM_CLOCK_FREQUENCY 12000000
|
||||||
|
static inline int system_clock_frequency_read(void) {
|
||||||
|
return 12000000;
|
||||||
|
}
|
||||||
|
#define ROM_DISABLE 1
|
||||||
|
static inline int rom_disable_read(void) {
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
#define CONFIG_BITSTREAM_SYNC_HEADER1 2123999870
|
#define CONFIG_BITSTREAM_SYNC_HEADER1 2123999870
|
||||||
static inline int config_bitstream_sync_header1_read(void) {
|
static inline int config_bitstream_sync_header1_read(void) {
|
||||||
return 2123999870;
|
return 2123999870;
|
||||||
@ -736,9 +619,9 @@ static inline int config_cpu_reset_addr_read(void) {
|
|||||||
static inline const char * config_cpu_type_read(void) {
|
static inline const char * config_cpu_type_read(void) {
|
||||||
return "VEXRISCV";
|
return "VEXRISCV";
|
||||||
}
|
}
|
||||||
#define CONFIG_CSR_ALIGNMENT 32
|
#define CONFIG_CPU_VARIANT "VEXRISCV"
|
||||||
static inline int config_csr_alignment_read(void) {
|
static inline const char * config_cpu_variant_read(void) {
|
||||||
return 32;
|
return "VEXRISCV";
|
||||||
}
|
}
|
||||||
#define CONFIG_CSR_DATA_WIDTH 8
|
#define CONFIG_CSR_DATA_WIDTH 8
|
||||||
static inline int config_csr_data_width_read(void) {
|
static inline int config_csr_data_width_read(void) {
|
||||||
|
Loading…
Reference in New Issue
Block a user