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foboot-bitstream: fix comments and reorder to improve timing
Reordering the file seems to improve timing by quite a lot, even after adjusting the pnr seed. With this reordering we now meet timing. Signed-off-by: Sean Cross <sean@xobs.io>
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@ -197,7 +197,8 @@ class BaseSoC(SoCCore, AutoDoc):
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else:
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raise ValueError("unrecognized boot_source: {}".format(boot_source))
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# Add a simple bit-banged SPI Flash module
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# The litex SPI module supports memory-mapped reads, as well as a bit-banged mode
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# for doing writes.
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spi_pads = platform.request("spiflash4x")
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if spi_pads is not None:
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self.submodules.lxspi = spi_flash.SpiFlashDualQuad(spi_pads, dummy=6, endianness="little")
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@ -207,26 +208,14 @@ class BaseSoC(SoCCore, AutoDoc):
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self.register_mem("spiflash", self.mem_map["spiflash"],
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self.lxspi.bus, size=2 * 1024 * 1024) # NOTE: EVT is 16 * 1024 * 1024
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# self.submodules.picorvspi = PicoRVSpi(platform, platform.request("spiflash"))
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# self.register_mem("spiflash", self.mem_map["spiflash"],
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# self.picorvspi.bus, size=self.picorvspi.size)
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self.submodules.reboot = SBWarmBoot(self, warmboot_offsets)
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if hasattr(self, "cpu"):
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self.cpu.cpu_params.update(
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i_externalResetVector=self.reboot.addr.storage,
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)
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self.submodules.rgb = SBLED(platform.revision, platform.request("rgb_led"))
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self.submodules.version = Version(platform.revision, pnr_seed, models=[
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("0x45", "E", "Fomu EVT"),
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("0x44", "D", "Fomu DVT"),
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("0x50", "P", "Fomu PVT (production)"),
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("0x48", "H", "Fomu Hacker"),
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("0x3f", "?", "Unknown model"),
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])
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# Add USB pads
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# Add USB pads, as well as the appropriate USB controller. If no CPU is
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# present, use the DummyUsb controller.
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usb_pads = platform.request("usb")
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usb_iobuf = usbio.IoBuf(usb_pads.d_p, usb_pads.d_n, usb_pads.pullup)
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if hasattr(self, "cpu"):
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@ -246,6 +235,15 @@ class BaseSoC(SoCCore, AutoDoc):
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platform.add_extension(TouchPads.touch_device)
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self.submodules.touch = TouchPads(platform.request("touch_pads"))
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self.submodules.rgb = SBLED(platform.revision, platform.request("rgb_led"))
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self.submodules.version = Version(platform.revision, pnr_seed, models=[
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("0x45", "E", "Fomu EVT"),
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("0x44", "D", "Fomu DVT"),
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("0x50", "P", "Fomu PVT (production)"),
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("0x48", "H", "Fomu Hacker"),
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("0x3f", "?", "Unknown model"),
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])
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# Add "-relut -dffe_min_ce_use 4" to the synth_ice40 command.
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# The "-reult" adds an additional LUT pass to pack more stuff in,
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# and the "-dffe_min_ce_use 4" flag prevents Yosys from generating a
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