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https://github.com/im-tomu/foboot.git
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spi: speed up bit banging and special case everything
This patch significantly improves SPI throughput by avoiding many duplicated writes. For example, we now only adjust the MISO direction once during every byte rather than for every bit. This improves the time it takes to upload a 128 kilobyte file from 29 seconds to 6 seconds. Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
Sean Cross
parent
1f91f81f8e
commit
c6c3ae8c47
@ -3,74 +3,20 @@
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#include <stdint.h>
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enum spi_state {
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SS_UNCONFIGURED = 0,
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SS_SINGLE,
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SS_DUAL_RX,
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SS_DUAL_TX,
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SS_QUAD_RX,
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SS_QUAD_TX,
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SS_HARDWARE,
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};
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enum spi_type {
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ST_UNCONFIGURED,
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ST_SINGLE,
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ST_DUAL,
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ST_QUAD,
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ST_QPI,
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};
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enum spi_pin {
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SP_MOSI,
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SP_MISO,
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SP_HOLD,
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SP_WP,
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SP_CS,
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SP_CLK,
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SP_D0,
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SP_D1,
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SP_D2,
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SP_D3,
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};
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struct spi_id {
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uint8_t manufacturer_id; // Result from 0x90
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uint8_t device_id; // Result from 0x90
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uint8_t _manufacturer_id; // Result from 0x9f
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uint8_t memory_type; // Result from 0x9f
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uint8_t memory_size; // Result from 0x9f
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uint8_t signature; // Result from 0xab
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uint8_t serial[4]; // Result from 0x4b
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int bytes; // -1 if unknown
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const char *manufacturer;
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const char *model;
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const char *capacity;
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};
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void spiPause(void);
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void spiBegin(void);
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void spiEnd(void);
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void spiCommand(uint8_t cmd);
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int spiTx(uint8_t word);
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uint8_t spiRx(void);
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uint8_t spiReadStatus(uint8_t sr);
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void spiWriteStatus(uint8_t sr, uint8_t val);
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void spiReadSecurity(uint8_t sr, uint8_t security[256]);
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void spiWriteSecurity(uint8_t sr, uint8_t security[256]);
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int spiSetType(enum spi_type type);
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int spiRead(uint32_t addr, uint8_t *data, unsigned int count);
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int spiIsBusy(void);
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int spiBeginErase4(uint32_t erase_addr);
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int spiBeginErase32(uint32_t erase_addr);
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int spiBeginErase64(uint32_t erase_addr);
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int spiBeginWrite(uint32_t addr, const void *data, unsigned int count);
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void spiEnableQuad(void);
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struct spi_id spiId(void);
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void spiOverrideSize(uint32_t new_size);
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uint32_t spiId(void);
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//int spi_wait_for_not_busy(void);
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int spiWrite(uint32_t addr, const uint8_t *data, unsigned int count);
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uint8_t spiReset(void);
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int spiInit(void);
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@ -79,7 +25,6 @@ void spiHold(void);
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void spiUnhold(void);
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void spiSwapTxRx(void);
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void spiSetPin(enum spi_pin pin, int val);
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void spiFree(void);
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#endif /* BB_SPI_H_ */
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141
sw/src/spi.c
141
sw/src/spi.c
@ -11,9 +11,7 @@
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#include "spi.h"
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struct spi_id spi_id;
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static uint8_t do_mirror;
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static uint32_t do_mirror;
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enum pin {
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#if defined(CSR_PICORVSPI_BASE)
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@ -33,19 +31,19 @@ enum pin {
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#endif
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};
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static void gpioWrite(enum pin pin, int val);
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static void gpio_write(enum pin pin, int val);
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static void gpioDirection(int is_input) {
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static void gpio_direction(int is_input) {
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#if defined(CSR_LXSPI_BASE)
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if (is_input == ((do_mirror >> PIN_MISO_EN) & 1))
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return;
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gpioWrite(PIN_MISO_EN, is_input);
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gpio_write(PIN_MISO_EN, is_input);
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#else
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(void)is_input;
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#endif
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}
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static void gpioWrite(enum pin pin, int val) {
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static void gpio_write(enum pin pin, int val) {
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if (val)
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do_mirror |= 1 << pin;
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else
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@ -54,95 +52,59 @@ static void gpioWrite(enum pin pin, int val) {
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picorvspi_cfg1_write(do_mirror);
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#endif
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#if defined(CSR_LXSPI_BASE)
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if (pin == PIN_MOSI)
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gpioDirection(1);
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lxspi_bitbang_write(do_mirror);
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#endif
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}
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static int gpioRead(int pin) {
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static int gpio_read(int pin) {
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#if defined(CSR_PICORVSPI_BASE)
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return !!(picorvspi_stat1_read() & (1 << pin));
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#endif
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#if defined(CSR_LXSPI_BASE)
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if (pin == PIN_MISO)
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gpioDirection(1);
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(void)pin;
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return lxspi_miso_read();
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#endif
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}
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static void gpioSync(void) {
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}
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enum ff_spi_quirks {
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// There is no separate "Write SR 2" command. Instead,
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// you must write SR2 after writing SR1
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SQ_SR2_FROM_SR1 = (1 << 0),
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// Don't issue a "Write Enable" command prior to writing
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// a status register
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SQ_SKIP_SR_WEL = (1 << 1),
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// Security registers are shifted up by 4 bits
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SQ_SECURITY_NYBBLE_SHIFT = (1 << 2),
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};
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struct ff_spi {
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enum spi_state state;
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enum spi_type type;
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enum spi_type desired_type;
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struct spi_id id;
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enum ff_spi_quirks quirks;
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int size_override;
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};
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static void spi_get_id(void);
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void spiPause(void) {
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gpioSync();
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return;
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}
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void spiBegin(void) {
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gpioWrite(PIN_CS, 0);
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lxspi_bitbang_write((0 << PIN_MISO_EN) | (0 << PIN_CLK) | (0 << PIN_CS));
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}
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void spiEnd(void) {
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gpioWrite(PIN_CS, 1);
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lxspi_bitbang_write(1 << PIN_CS);
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}
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static uint8_t spiXfer(uint8_t out) {
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static void spiSingleTx(uint8_t out) {
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int bit;
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uint8_t in = 0;
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for (bit = 7; bit >= 0; bit--) {
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if (out & (1 << bit)) {
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gpioWrite(PIN_MOSI, 1);
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lxspi_bitbang_write((0 << PIN_CLK) | (1 << PIN_MOSI));
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lxspi_bitbang_write((1 << PIN_CLK) | (1 << PIN_MOSI));
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} else {
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lxspi_bitbang_write((0 << PIN_CLK) | (0 << PIN_MOSI));
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lxspi_bitbang_write((1 << PIN_CLK) | (0 << PIN_MOSI));
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}
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else {
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gpioWrite(PIN_MOSI, 0);
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}
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gpioWrite(PIN_CLK, 1);
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spiPause();
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in |= ((!!gpioRead(PIN_MISO)) << bit);
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gpioWrite(PIN_CLK, 0);
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spiPause();
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}
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}
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static uint8_t spiSingleRx(void) {
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int bit = 0;
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uint8_t in = 0;
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lxspi_bitbang_write((1 << PIN_MISO_EN) | (0 << PIN_CLK));
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while (bit++ < 8) {
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lxspi_bitbang_write((1 << PIN_MISO_EN) | (1 << PIN_CLK));
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in = (in << 1) | gpio_read(PIN_MISO);
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lxspi_bitbang_write((1 << PIN_MISO_EN) | (0 << PIN_CLK));
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}
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return in;
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}
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static void spiSingleTx(uint8_t out) {
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spiXfer(out);
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}
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static uint8_t spiSingleRx(void) {
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return spiXfer(0xff);
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}
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uint8_t spiReadStatus(uint8_t sr) {
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uint8_t val = 0xff;
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(void)sr;
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static uint8_t spi_read_status(void) {
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uint8_t val;
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spiBegin();
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spiSingleTx(0x05);
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@ -151,20 +113,35 @@ uint8_t spiReadStatus(uint8_t sr) {
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return val;
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}
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static void spi_get_id(void) {
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spiBegin();
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spiSingleTx(0x90); // Read manufacturer ID
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spiSingleTx(0x00); // Dummy byte 1
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spiSingleTx(0x00); // Dummy byte 2
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spiSingleTx(0x00); // Dummy byte 3
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spi_id.manufacturer_id = spiSingleRx();
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spi_id.device_id = spiSingleRx();
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spiEnd();
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return;
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int spiIsBusy(void) {
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return spi_read_status() & (1 << 0);
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}
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int spiIsBusy(void) {
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return spiReadStatus(1) & (1 << 0);
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__attribute__((used))
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uint32_t spi_id;
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__attribute__((used))
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uint32_t spiId(void) {
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uint32_t id = 0;
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spiBegin();
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spiSingleTx(0x90); // Read manufacturer ID
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spiSingleTx(0x00); // Dummy byte 1
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spiSingleTx(0x00); // Dummy byte 2
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spiSingleTx(0x00); // Dummy byte 3
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id = (id << 8) | spiSingleRx(); // Manufacturer ID
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id = (id << 8) | spiSingleRx(); // Device ID
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spiEnd();
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spiBegin();
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spiSingleTx(0x9f); // Read device id
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(void)spiSingleRx(); // Manufacturer ID (again)
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id = (id << 8) | spiSingleRx(); // Memory Type
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id = (id << 8) | spiSingleRx(); // Memory Size
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spiEnd();
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spi_id = id;
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return id;
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}
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int spiBeginErase4(uint32_t erase_addr) {
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@ -262,10 +239,10 @@ int spiInit(void) {
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#endif
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// Reset the SPI flash, which will return it to SPI mode even
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// if it's in QPI mode.
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// if it's in QPI mode, and ensure the chip is accepting commands.
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spiReset();
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spi_get_id();
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spiId();
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return 0;
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}
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