Merge remote-tracking branch 'xobs/master'

Signed-off-by: Sean Cross <sean@xobs.io>

booster/include/csr_accessors.h

@@ -0,0 +1,33 @@
+#ifndef CSR_ACCESSORS_DEFINED
+#define CSR_ACCESSORS_DEFINED
+#include <stdint.h>
+static inline void csr_writeb(uint8_t value, uint32_t addr)
+{
+        *((volatile uint8_t *)addr) = value;
+}
+
+static inline uint8_t csr_readb(uint32_t addr)
+{
+        return *(volatile uint8_t *)addr;
+}
+
+static inline void csr_writew(uint16_t value, uint32_t addr)
+{
+        *((volatile uint16_t *)addr) = value;
+}
+
+static inline uint16_t csr_readw(uint32_t addr)
+{
+        return *(volatile uint16_t *)addr;
+}
+
+static inline void csr_writel(uint32_t value, uint32_t addr)
+{
+        *((volatile uint32_t *)addr) = value;
+}
+
+static inline uint32_t csr_readl(uint32_t addr)
+{
+        return *(volatile uint32_t *)addr;
+}
+#endif /* CSR_ACCESSORS_DEFINED */

booster/ld/linker.ld

@@ -42,6 +42,7 @@ SECTIONS
 		*(.rodata .rodata.* .gnu.linkonce.r.*)
 		*(.rodata1)
 		*(.srodata)
+		. = ALIGN(4);
 		_erodata = .;
 
 		. = ALIGN(4);
@@ -53,7 +54,7 @@ SECTIONS
 		_edata = ALIGN(16); /* Make sure _edata is >= _gp. */
 	} > sram
 
-  	booster_data = ADDR(.data) + SIZEOF(.data);
+/*	booster_data = ADDR(.data) + SIZEOF(.data); */
 	booster_src = ADDR(.startup) + SIZEOF(.startup) + SIZEOF(.data);
 }
 

booster/src/rgb.c

@@ -1,3 +1,4 @@
+#include <csr_accessors.h>
 #include <csr.h>
 
 enum led_registers

booster/src/usb-epfifo.c

@@ -0,0 +1,259 @@
+#include <csr_accessors.h>
+#include <csr.h>
+#include <irq.h>
+#include <string.h>
+#include <usb.h>
+
+// #ifdef CSR_USB_EP_0_OUT_EV_PENDING_ADDR
+#if 1
+
+#define EP0OUT_BUFFERS 8
+__attribute__((aligned(4)))
+static uint8_t volatile usb_ep0out_buffer_len[EP0OUT_BUFFERS];
+static uint8_t volatile usb_ep0out_buffer[EP0OUT_BUFFERS][128];
+static uint8_t volatile usb_ep0out_last_tok[EP0OUT_BUFFERS];
+static volatile uint8_t usb_ep0out_wr_ptr;
+static volatile uint8_t usb_ep0out_rd_ptr;
+static const int max_byte_length = 64;
+
+static const uint8_t * volatile current_data;
+static volatile int current_length;
+static volatile int data_offset;
+static volatile int data_to_send;
+static int next_packet_is_empty;
+
+static uint8_t new_address;
+static int have_new_address;
+
+// Note that our PIDs are only bits 2 and 3 of the token,
+// since all other bits are effectively redundant at this point.
+enum USB_PID {
+    USB_PID_OUT   = 0,
+    USB_PID_SOF   = 1,
+    USB_PID_IN    = 2,
+    USB_PID_SETUP = 3,
+};
+
+enum epfifo_response {
+    EPF_ACK = 0,
+    EPF_NAK = 1,
+    EPF_NONE = 2,
+    EPF_STALL = 3,
+};
+
+#define USB_EV_ERROR 1
+#define USB_EV_PACKET 2
+
+void usb_set_address(uint8_t address) {
+    new_address = address;
+    have_new_address = 1;
+}
+
+void usb_idle(void) {
+    usb_ep_0_out_ev_enable_write(0);
+    usb_ep_0_in_ev_enable_write(0);
+
+    // Reject all incoming data, since there is no handler anymore
+    usb_ep_0_out_respond_write(EPF_NAK);
+
+    // Reject outgoing data, since we don't have any to give.
+    usb_ep_0_in_respond_write(EPF_NAK);
+
+    irq_setmask(irq_getmask() & ~(1 << USB_INTERRUPT));
+}
+
+void usb_disconnect(void) {
+    usb_ep_0_out_ev_enable_write(0);
+    usb_ep_0_in_ev_enable_write(0);
+    irq_setmask(irq_getmask() & ~(1 << USB_INTERRUPT));
+    usb_pullup_out_write(0);
+    usb_address_write(0);
+}
+
+void usb_connect(void) {
+
+    usb_ep_0_out_ev_pending_write(usb_ep_0_out_ev_enable_read());
+    usb_ep_0_in_ev_pending_write(usb_ep_0_in_ev_pending_read());
+    usb_ep_0_out_ev_enable_write(USB_EV_PACKET | USB_EV_ERROR);
+    usb_ep_0_in_ev_enable_write(USB_EV_PACKET | USB_EV_ERROR);
+
+    // Accept incoming data by default.
+    usb_ep_0_out_respond_write(EPF_ACK);
+
+    // Reject outgoing data, since we have none to give yet.
+    usb_ep_0_in_respond_write(EPF_NAK);
+
+    usb_pullup_out_write(1);
+
+	irq_setmask(irq_getmask() | (1 << USB_INTERRUPT));
+}
+
+void usb_init(void) {
+    usb_ep0out_wr_ptr = 0;
+    usb_ep0out_rd_ptr = 0;
+    usb_disconnect();
+}
+
+static void process_tx(void) {
+
+    // Don't allow requeueing -- only queue more data if we're
+    // currently set up to respond NAK.
+    if (usb_ep_0_in_respond_read() != EPF_NAK) {
+        return;
+    }
+
+    // Prevent us from double-filling the buffer.
+    if (!usb_ep_0_in_ibuf_empty_read()) {
+        return;
+    }
+
+    if (!current_data || !current_length) {
+        return;
+    }
+
+    data_offset += data_to_send;
+
+    data_to_send = current_length - data_offset;
+
+    // Clamp the data to the maximum packet length
+    if (data_to_send > max_byte_length) {
+        data_to_send = max_byte_length;
+        next_packet_is_empty = 0;
+    }
+    else if (data_to_send == max_byte_length) {
+        next_packet_is_empty = 1;
+    }
+    else if (next_packet_is_empty) {
+        next_packet_is_empty = 0;
+        data_to_send = 0;
+    }
+    else if (current_data == NULL || data_to_send <= 0) {
+        next_packet_is_empty = 0;
+        current_data = NULL;
+        current_length = 0;
+        data_offset = 0;
+        data_to_send = 0;
+        return;
+    }
+
+    int this_offset;
+    for (this_offset = data_offset; this_offset < (data_offset + data_to_send); this_offset++) {
+        usb_ep_0_in_ibuf_head_write(current_data[this_offset]);
+    }
+    usb_ep_0_in_respond_write(EPF_ACK);
+    return;
+}
+
+void usb_send(const void *data, int total_count) {
+
+    while ((current_length || current_data))// && usb_ep_0_in_respond_read() != EPF_NAK)
+        ;
+    current_data = (uint8_t *)data;
+    current_length = total_count;
+    data_offset = 0;
+    data_to_send = 0;
+    process_tx();
+}
+
+void usb_wait_for_send_done(void) {
+    while (current_data && current_length)
+        ;
+    while ((usb_ep_0_in_dtb_read() & 1) == 1)
+        ;
+}
+
+void usb_isr(void) {
+    uint8_t ep0o_pending = usb_ep_0_out_ev_pending_read();
+    uint8_t ep0i_pending = usb_ep_0_in_ev_pending_read();
+
+    // We got an OUT or a SETUP packet.  Copy it to usb_ep0out_buffer
+    // and clear the "pending" bit.
+    if (ep0o_pending) {
+        uint8_t last_tok = usb_ep_0_out_last_tok_read();
+        uint32_t obuf_len = 0;
+        static uint8_t obuf[128];
+        if (!usb_ep_0_out_obuf_empty_read()) {
+            while (!usb_ep_0_out_obuf_empty_read()) {
+                obuf[obuf_len++] = usb_ep_0_out_obuf_head_read();
+                usb_ep_0_out_obuf_head_write(0);
+            }
+        }
+
+//        if (obuf_len >= 2)
+//            obuf_len -= 2 /* Strip off CRC16 */;
+
+//        if (last_tok == USB_PID_SETUP) {
+        if (obuf_len >= 8) {
+            // HACK: There's no inter-packet indicator, so sometimes we
+            // receive an ACK packet at the start of our SETUP packet.
+            // To work around this, assume that all SETUP packets are 10-
+            // bytes (8 bytes plus CRC16) and work backwards from the end
+            // of the buffer.
+            uint32_t setup_pkt[2];
+            memcpy(setup_pkt, obuf + obuf_len - 10, 8);
+            usb_ep_0_in_dtb_write(1);
+            data_offset = 0;
+            current_length = 0;
+            current_data = NULL;
+            usb_setup((const void *)setup_pkt, 8);
+        }
+
+        usb_ep_0_out_ev_pending_write(ep0o_pending);
+        usb_ep_0_out_respond_write(EPF_ACK);
+    }
+
+    // We just got an "IN" token.  Send data if we have it.
+    if (ep0i_pending) {
+        usb_ep_0_in_respond_write(EPF_NAK);
+        usb_ep_0_in_ev_pending_write(ep0i_pending);
+        if (have_new_address) {
+            have_new_address = 0;
+            usb_address_write(new_address);
+        }
+    }
+    
+    return;
+}
+
+void usb_ack_in(void) {
+    while (usb_ep_0_in_respond_read() == EPF_ACK)
+        ;
+    usb_ep_0_in_respond_write(EPF_ACK);
+}
+
+void usb_ack_out(void) {
+    while (usb_ep_0_out_respond_read() == EPF_ACK)
+        ;
+    usb_ep_0_out_respond_write(EPF_ACK);
+}
+
+void usb_err(void) {
+    usb_ep_0_out_respond_write(EPF_STALL);
+    usb_ep_0_in_respond_write(EPF_STALL);
+}
+
+int usb_recv(void *buffer, unsigned int buffer_len) {
+
+    // Set the OUT response to ACK, since we are in a position to receive data now.
+    usb_ep_0_out_respond_write(EPF_ACK);
+    while (1) {
+        if (usb_ep0out_rd_ptr != usb_ep0out_wr_ptr) {
+            if (usb_ep0out_last_tok[usb_ep0out_rd_ptr] == USB_PID_OUT) {
+                unsigned int ep0_buffer_len = usb_ep0out_buffer_len[usb_ep0out_rd_ptr];
+                if (ep0_buffer_len < buffer_len)
+                    buffer_len = ep0_buffer_len;
+                // usb_ep0out_buffer_len[usb_ep0out_rd_ptr] = 0;
+                memcpy(buffer, (void *)&usb_ep0out_buffer[usb_ep0out_rd_ptr], buffer_len);
+                usb_ep0out_rd_ptr = (usb_ep0out_rd_ptr + 1) & (EP0OUT_BUFFERS-1);
+                return buffer_len;
+            }
+            else if (usb_ep0out_last_tok[usb_ep0out_rd_ptr] == USB_PID_SETUP) {
+                return -1;
+            }
+            usb_ep0out_rd_ptr = (usb_ep0out_rd_ptr + 1) & (EP0OUT_BUFFERS-1);
+        }
+    }
+    return 0;
+}
+
+#endif /* CSR_USB_EP_0_OUT_EV_PENDING_ADDR */

releases/v1.9.1/csr.h

@@ -0,0 +1,773 @@
+//--------------------------------------------------------------------------------
+// Auto-generated by Migen (ae42105) & LiteX (3a72688b) on 2019-08-23 13:21:26
+//--------------------------------------------------------------------------------
+#ifndef __GENERATED_CSR_H
+#define __GENERATED_CSR_H
+#include <stdint.h>
+#ifdef CSR_ACCESSORS_DEFINED
+extern void csr_writeb(uint8_t value, unsigned long addr);
+extern uint8_t csr_readb(unsigned long addr);
+extern void csr_writew(uint16_t value, unsigned long addr);
+extern uint16_t csr_readw(unsigned long addr);
+extern void csr_writel(uint32_t value, unsigned long addr);
+extern uint32_t csr_readl(unsigned long addr);
+#else /* ! CSR_ACCESSORS_DEFINED */
+#include <hw/common.h>
+#endif /* ! CSR_ACCESSORS_DEFINED */
+
+/* ctrl */
+#define CSR_CTRL_BASE 0xe0000000L
+#define CSR_CTRL_RESET_ADDR 0xe0000000L
+#define CSR_CTRL_RESET_SIZE 1
+static inline unsigned char ctrl_reset_read(void) {
+	unsigned char r = csr_readl(0xe0000000L);
+	return r;
+}
+static inline void ctrl_reset_write(unsigned char value) {
+	csr_writel(value, 0xe0000000L);
+}
+#define CSR_CTRL_SCRATCH_ADDR 0xe0000004L
+#define CSR_CTRL_SCRATCH_SIZE 4
+static inline unsigned int ctrl_scratch_read(void) {
+	unsigned int r = csr_readl(0xe0000004L);
+	r <<= 8;
+	r |= csr_readl(0xe0000008L);
+	r <<= 8;
+	r |= csr_readl(0xe000000cL);
+	r <<= 8;
+	r |= csr_readl(0xe0000010L);
+	return r;
+}
+static inline void ctrl_scratch_write(unsigned int value) {
+	csr_writel(value >> 24, 0xe0000004L);
+	csr_writel(value >> 16, 0xe0000008L);
+	csr_writel(value >> 8, 0xe000000cL);
+	csr_writel(value, 0xe0000010L);
+}
+#define CSR_CTRL_BUS_ERRORS_ADDR 0xe0000014L
+#define CSR_CTRL_BUS_ERRORS_SIZE 4
+static inline unsigned int ctrl_bus_errors_read(void) {
+	unsigned int r = csr_readl(0xe0000014L);
+	r <<= 8;
+	r |= csr_readl(0xe0000018L);
+	r <<= 8;
+	r |= csr_readl(0xe000001cL);
+	r <<= 8;
+	r |= csr_readl(0xe0000020L);
+	return r;
+}
+
+/* picorvspi */
+#define CSR_PICORVSPI_BASE 0xe0005000L
+#define CSR_PICORVSPI_CFG1_ADDR 0xe0005000L
+#define CSR_PICORVSPI_CFG1_SIZE 1
+static inline unsigned char picorvspi_cfg1_read(void) {
+	unsigned char r = csr_readl(0xe0005000L);
+	return r;
+}
+static inline void picorvspi_cfg1_write(unsigned char value) {
+	csr_writel(value, 0xe0005000L);
+}
+#define CSR_PICORVSPI_CFG2_ADDR 0xe0005004L
+#define CSR_PICORVSPI_CFG2_SIZE 1
+static inline unsigned char picorvspi_cfg2_read(void) {
+	unsigned char r = csr_readl(0xe0005004L);
+	return r;
+}
+static inline void picorvspi_cfg2_write(unsigned char value) {
+	csr_writel(value, 0xe0005004L);
+}
+#define CSR_PICORVSPI_CFG3_ADDR 0xe0005008L
+#define CSR_PICORVSPI_CFG3_SIZE 1
+static inline unsigned char picorvspi_cfg3_read(void) {
+	unsigned char r = csr_readl(0xe0005008L);
+	return r;
+}
+static inline void picorvspi_cfg3_write(unsigned char value) {
+	csr_writel(value, 0xe0005008L);
+}
+#define CSR_PICORVSPI_CFG4_ADDR 0xe000500cL
+#define CSR_PICORVSPI_CFG4_SIZE 1
+static inline unsigned char picorvspi_cfg4_read(void) {
+	unsigned char r = csr_readl(0xe000500cL);
+	return r;
+}
+static inline void picorvspi_cfg4_write(unsigned char value) {
+	csr_writel(value, 0xe000500cL);
+}
+#define CSR_PICORVSPI_STAT1_ADDR 0xe0005010L
+#define CSR_PICORVSPI_STAT1_SIZE 1
+static inline unsigned char picorvspi_stat1_read(void) {
+	unsigned char r = csr_readl(0xe0005010L);
+	return r;
+}
+#define CSR_PICORVSPI_STAT2_ADDR 0xe0005014L
+#define CSR_PICORVSPI_STAT2_SIZE 1
+static inline unsigned char picorvspi_stat2_read(void) {
+	unsigned char r = csr_readl(0xe0005014L);
+	return r;
+}
+#define CSR_PICORVSPI_STAT3_ADDR 0xe0005018L
+#define CSR_PICORVSPI_STAT3_SIZE 1
+static inline unsigned char picorvspi_stat3_read(void) {
+	unsigned char r = csr_readl(0xe0005018L);
+	return r;
+}
+#define CSR_PICORVSPI_STAT4_ADDR 0xe000501cL
+#define CSR_PICORVSPI_STAT4_SIZE 1
+static inline unsigned char picorvspi_stat4_read(void) {
+	unsigned char r = csr_readl(0xe000501cL);
+	return r;
+}
+
+/* reboot */
+#define CSR_REBOOT_BASE 0xe0006000L
+#define CSR_REBOOT_CTRL_ADDR 0xe0006000L
+#define CSR_REBOOT_CTRL_SIZE 1
+static inline unsigned char reboot_ctrl_read(void) {
+	unsigned char r = csr_readl(0xe0006000L);
+	return r;
+}
+static inline void reboot_ctrl_write(unsigned char value) {
+	csr_writel(value, 0xe0006000L);
+}
+#define CSR_REBOOT_ADDR_ADDR 0xe0006004L
+#define CSR_REBOOT_ADDR_SIZE 4
+static inline unsigned int reboot_addr_read(void) {
+	unsigned int r = csr_readl(0xe0006004L);
+	r <<= 8;
+	r |= csr_readl(0xe0006008L);
+	r <<= 8;
+	r |= csr_readl(0xe000600cL);
+	r <<= 8;
+	r |= csr_readl(0xe0006010L);
+	return r;
+}
+static inline void reboot_addr_write(unsigned int value) {
+	csr_writel(value >> 24, 0xe0006004L);
+	csr_writel(value >> 16, 0xe0006008L);
+	csr_writel(value >> 8, 0xe000600cL);
+	csr_writel(value, 0xe0006010L);
+}
+
+/* rgb */
+#define CSR_RGB_BASE 0xe0006800L
+#define CSR_RGB_DAT_ADDR 0xe0006800L
+#define CSR_RGB_DAT_SIZE 1
+static inline unsigned char rgb_dat_read(void) {
+	unsigned char r = csr_readl(0xe0006800L);
+	return r;
+}
+static inline void rgb_dat_write(unsigned char value) {
+	csr_writel(value, 0xe0006800L);
+}
+#define CSR_RGB_ADDR_ADDR 0xe0006804L
+#define CSR_RGB_ADDR_SIZE 1
+static inline unsigned char rgb_addr_read(void) {
+	unsigned char r = csr_readl(0xe0006804L);
+	return r;
+}
+static inline void rgb_addr_write(unsigned char value) {
+	csr_writel(value, 0xe0006804L);
+}
+#define CSR_RGB_CTRL_ADDR 0xe0006808L
+#define CSR_RGB_CTRL_SIZE 1
+static inline unsigned char rgb_ctrl_read(void) {
+	unsigned char r = csr_readl(0xe0006808L);
+	return r;
+}
+static inline void rgb_ctrl_write(unsigned char value) {
+	csr_writel(value, 0xe0006808L);
+}
+#define CSR_RGB_RAW_ADDR 0xe000680cL
+#define CSR_RGB_RAW_SIZE 1
+static inline unsigned char rgb_raw_read(void) {
+	unsigned char r = csr_readl(0xe000680cL);
+	return r;
+}
+static inline void rgb_raw_write(unsigned char value) {
+	csr_writel(value, 0xe000680cL);
+}
+
+/* timer0 */
+#define CSR_TIMER0_BASE 0xe0002800L
+#define CSR_TIMER0_LOAD_ADDR 0xe0002800L
+#define CSR_TIMER0_LOAD_SIZE 4
+static inline unsigned int timer0_load_read(void) {
+	unsigned int r = csr_readl(0xe0002800L);
+	r <<= 8;
+	r |= csr_readl(0xe0002804L);
+	r <<= 8;
+	r |= csr_readl(0xe0002808L);
+	r <<= 8;
+	r |= csr_readl(0xe000280cL);
+	return r;
+}
+static inline void timer0_load_write(unsigned int value) {
+	csr_writel(value >> 24, 0xe0002800L);
+	csr_writel(value >> 16, 0xe0002804L);
+	csr_writel(value >> 8, 0xe0002808L);
+	csr_writel(value, 0xe000280cL);
+}
+#define CSR_TIMER0_RELOAD_ADDR 0xe0002810L
+#define CSR_TIMER0_RELOAD_SIZE 4
+static inline unsigned int timer0_reload_read(void) {
+	unsigned int r = csr_readl(0xe0002810L);
+	r <<= 8;
+	r |= csr_readl(0xe0002814L);
+	r <<= 8;
+	r |= csr_readl(0xe0002818L);
+	r <<= 8;
+	r |= csr_readl(0xe000281cL);
+	return r;
+}
+static inline void timer0_reload_write(unsigned int value) {
+	csr_writel(value >> 24, 0xe0002810L);
+	csr_writel(value >> 16, 0xe0002814L);
+	csr_writel(value >> 8, 0xe0002818L);
+	csr_writel(value, 0xe000281cL);
+}
+#define CSR_TIMER0_EN_ADDR 0xe0002820L
+#define CSR_TIMER0_EN_SIZE 1
+static inline unsigned char timer0_en_read(void) {
+	unsigned char r = csr_readl(0xe0002820L);
+	return r;
+}
+static inline void timer0_en_write(unsigned char value) {
+	csr_writel(value, 0xe0002820L);
+}
+#define CSR_TIMER0_UPDATE_VALUE_ADDR 0xe0002824L
+#define CSR_TIMER0_UPDATE_VALUE_SIZE 1
+static inline unsigned char timer0_update_value_read(void) {
+	unsigned char r = csr_readl(0xe0002824L);
+	return r;
+}
+static inline void timer0_update_value_write(unsigned char value) {
+	csr_writel(value, 0xe0002824L);
+}
+#define CSR_TIMER0_VALUE_ADDR 0xe0002828L
+#define CSR_TIMER0_VALUE_SIZE 4
+static inline unsigned int timer0_value_read(void) {
+	unsigned int r = csr_readl(0xe0002828L);
+	r <<= 8;
+	r |= csr_readl(0xe000282cL);
+	r <<= 8;
+	r |= csr_readl(0xe0002830L);
+	r <<= 8;
+	r |= csr_readl(0xe0002834L);
+	return r;
+}
+#define CSR_TIMER0_EV_STATUS_ADDR 0xe0002838L
+#define CSR_TIMER0_EV_STATUS_SIZE 1
+static inline unsigned char timer0_ev_status_read(void) {
+	unsigned char r = csr_readl(0xe0002838L);
+	return r;
+}
+static inline void timer0_ev_status_write(unsigned char value) {
+	csr_writel(value, 0xe0002838L);
+}
+#define CSR_TIMER0_EV_PENDING_ADDR 0xe000283cL
+#define CSR_TIMER0_EV_PENDING_SIZE 1
+static inline unsigned char timer0_ev_pending_read(void) {
+	unsigned char r = csr_readl(0xe000283cL);
+	return r;
+}
+static inline void timer0_ev_pending_write(unsigned char value) {
+	csr_writel(value, 0xe000283cL);
+}
+#define CSR_TIMER0_EV_ENABLE_ADDR 0xe0002840L
+#define CSR_TIMER0_EV_ENABLE_SIZE 1
+static inline unsigned char timer0_ev_enable_read(void) {
+	unsigned char r = csr_readl(0xe0002840L);
+	return r;
+}
+static inline void timer0_ev_enable_write(unsigned char value) {
+	csr_writel(value, 0xe0002840L);
+}
+
+/* touch */
+#define CSR_TOUCH_BASE 0xe0005800L
+#define CSR_TOUCH_O_ADDR 0xe0005800L
+#define CSR_TOUCH_O_SIZE 1
+static inline unsigned char touch_o_read(void) {
+	unsigned char r = csr_readl(0xe0005800L);
+	return r;
+}
+static inline void touch_o_write(unsigned char value) {
+	csr_writel(value, 0xe0005800L);
+}
+#define CSR_TOUCH_OE_ADDR 0xe0005804L
+#define CSR_TOUCH_OE_SIZE 1
+static inline unsigned char touch_oe_read(void) {
+	unsigned char r = csr_readl(0xe0005804L);
+	return r;
+}
+static inline void touch_oe_write(unsigned char value) {
+	csr_writel(value, 0xe0005804L);
+}
+#define CSR_TOUCH_I_ADDR 0xe0005808L
+#define CSR_TOUCH_I_SIZE 1
+static inline unsigned char touch_i_read(void) {
+	unsigned char r = csr_readl(0xe0005808L);
+	return r;
+}
+
+/* usb */
+#define CSR_USB_BASE 0xe0004800L
+#define CSR_USB_PULLUP_OUT_ADDR 0xe0004800L
+#define CSR_USB_PULLUP_OUT_SIZE 1
+static inline unsigned char usb_pullup_out_read(void) {
+	unsigned char r = csr_readl(0xe0004800L);
+	return r;
+}
+static inline void usb_pullup_out_write(unsigned char value) {
+	csr_writel(value, 0xe0004800L);
+}
+#define CSR_USB_EP_0_OUT_EV_STATUS_ADDR 0xe0004804L
+#define CSR_USB_EP_0_OUT_EV_STATUS_SIZE 1
+static inline unsigned char usb_ep_0_out_ev_status_read(void) {
+	unsigned char r = csr_readl(0xe0004804L);
+	return r;
+}
+static inline void usb_ep_0_out_ev_status_write(unsigned char value) {
+	csr_writel(value, 0xe0004804L);
+}
+#define CSR_USB_EP_0_OUT_EV_PENDING_ADDR 0xe0004808L
+#define CSR_USB_EP_0_OUT_EV_PENDING_SIZE 1
+static inline unsigned char usb_ep_0_out_ev_pending_read(void) {
+	unsigned char r = csr_readl(0xe0004808L);
+	return r;
+}
+static inline void usb_ep_0_out_ev_pending_write(unsigned char value) {
+	csr_writel(value, 0xe0004808L);
+}
+#define CSR_USB_EP_0_OUT_EV_ENABLE_ADDR 0xe000480cL
+#define CSR_USB_EP_0_OUT_EV_ENABLE_SIZE 1
+static inline unsigned char usb_ep_0_out_ev_enable_read(void) {
+	unsigned char r = csr_readl(0xe000480cL);
+	return r;
+}
+static inline void usb_ep_0_out_ev_enable_write(unsigned char value) {
+	csr_writel(value, 0xe000480cL);
+}
+#define CSR_USB_EP_0_OUT_LAST_TOK_ADDR 0xe0004810L
+#define CSR_USB_EP_0_OUT_LAST_TOK_SIZE 1
+static inline unsigned char usb_ep_0_out_last_tok_read(void) {
+	unsigned char r = csr_readl(0xe0004810L);
+	return r;
+}
+#define CSR_USB_EP_0_OUT_RESPOND_ADDR 0xe0004814L
+#define CSR_USB_EP_0_OUT_RESPOND_SIZE 1
+static inline unsigned char usb_ep_0_out_respond_read(void) {
+	unsigned char r = csr_readl(0xe0004814L);
+	return r;
+}
+static inline void usb_ep_0_out_respond_write(unsigned char value) {
+	csr_writel(value, 0xe0004814L);
+}
+#define CSR_USB_EP_0_OUT_DTB_ADDR 0xe0004818L
+#define CSR_USB_EP_0_OUT_DTB_SIZE 1
+static inline unsigned char usb_ep_0_out_dtb_read(void) {
+	unsigned char r = csr_readl(0xe0004818L);
+	return r;
+}
+static inline void usb_ep_0_out_dtb_write(unsigned char value) {
+	csr_writel(value, 0xe0004818L);
+}
+#define CSR_USB_EP_0_OUT_OBUF_HEAD_ADDR 0xe000481cL
+#define CSR_USB_EP_0_OUT_OBUF_HEAD_SIZE 1
+static inline unsigned char usb_ep_0_out_obuf_head_read(void) {
+	unsigned char r = csr_readl(0xe000481cL);
+	return r;
+}
+static inline void usb_ep_0_out_obuf_head_write(unsigned char value) {
+	csr_writel(value, 0xe000481cL);
+}
+#define CSR_USB_EP_0_OUT_OBUF_EMPTY_ADDR 0xe0004820L
+#define CSR_USB_EP_0_OUT_OBUF_EMPTY_SIZE 1
+static inline unsigned char usb_ep_0_out_obuf_empty_read(void) {
+	unsigned char r = csr_readl(0xe0004820L);
+	return r;
+}
+#define CSR_USB_EP_0_IN_EV_STATUS_ADDR 0xe0004824L
+#define CSR_USB_EP_0_IN_EV_STATUS_SIZE 1
+static inline unsigned char usb_ep_0_in_ev_status_read(void) {
+	unsigned char r = csr_readl(0xe0004824L);
+	return r;
+}
+static inline void usb_ep_0_in_ev_status_write(unsigned char value) {
+	csr_writel(value, 0xe0004824L);
+}
+#define CSR_USB_EP_0_IN_EV_PENDING_ADDR 0xe0004828L
+#define CSR_USB_EP_0_IN_EV_PENDING_SIZE 1
+static inline unsigned char usb_ep_0_in_ev_pending_read(void) {
+	unsigned char r = csr_readl(0xe0004828L);
+	return r;
+}
+static inline void usb_ep_0_in_ev_pending_write(unsigned char value) {
+	csr_writel(value, 0xe0004828L);
+}
+#define CSR_USB_EP_0_IN_EV_ENABLE_ADDR 0xe000482cL
+#define CSR_USB_EP_0_IN_EV_ENABLE_SIZE 1
+static inline unsigned char usb_ep_0_in_ev_enable_read(void) {
+	unsigned char r = csr_readl(0xe000482cL);
+	return r;
+}
+static inline void usb_ep_0_in_ev_enable_write(unsigned char value) {
+	csr_writel(value, 0xe000482cL);
+}
+#define CSR_USB_EP_0_IN_LAST_TOK_ADDR 0xe0004830L
+#define CSR_USB_EP_0_IN_LAST_TOK_SIZE 1
+static inline unsigned char usb_ep_0_in_last_tok_read(void) {
+	unsigned char r = csr_readl(0xe0004830L);
+	return r;
+}
+#define CSR_USB_EP_0_IN_RESPOND_ADDR 0xe0004834L
+#define CSR_USB_EP_0_IN_RESPOND_SIZE 1
+static inline unsigned char usb_ep_0_in_respond_read(void) {
+	unsigned char r = csr_readl(0xe0004834L);
+	return r;
+}
+static inline void usb_ep_0_in_respond_write(unsigned char value) {
+	csr_writel(value, 0xe0004834L);
+}
+#define CSR_USB_EP_0_IN_DTB_ADDR 0xe0004838L
+#define CSR_USB_EP_0_IN_DTB_SIZE 1
+static inline unsigned char usb_ep_0_in_dtb_read(void) {
+	unsigned char r = csr_readl(0xe0004838L);
+	return r;
+}
+static inline void usb_ep_0_in_dtb_write(unsigned char value) {
+	csr_writel(value, 0xe0004838L);
+}
+#define CSR_USB_EP_0_IN_IBUF_HEAD_ADDR 0xe000483cL
+#define CSR_USB_EP_0_IN_IBUF_HEAD_SIZE 1
+static inline unsigned char usb_ep_0_in_ibuf_head_read(void) {
+	unsigned char r = csr_readl(0xe000483cL);
+	return r;
+}
+static inline void usb_ep_0_in_ibuf_head_write(unsigned char value) {
+	csr_writel(value, 0xe000483cL);
+}
+#define CSR_USB_EP_0_IN_IBUF_EMPTY_ADDR 0xe0004840L
+#define CSR_USB_EP_0_IN_IBUF_EMPTY_SIZE 1
+static inline unsigned char usb_ep_0_in_ibuf_empty_read(void) {
+	unsigned char r = csr_readl(0xe0004840L);
+	return r;
+}
+#define CSR_USB_EP_1_IN_EV_STATUS_ADDR 0xe0004844L
+#define CSR_USB_EP_1_IN_EV_STATUS_SIZE 1
+static inline unsigned char usb_ep_1_in_ev_status_read(void) {
+	unsigned char r = csr_readl(0xe0004844L);
+	return r;
+}
+static inline void usb_ep_1_in_ev_status_write(unsigned char value) {
+	csr_writel(value, 0xe0004844L);
+}
+#define CSR_USB_EP_1_IN_EV_PENDING_ADDR 0xe0004848L
+#define CSR_USB_EP_1_IN_EV_PENDING_SIZE 1
+static inline unsigned char usb_ep_1_in_ev_pending_read(void) {
+	unsigned char r = csr_readl(0xe0004848L);
+	return r;
+}
+static inline void usb_ep_1_in_ev_pending_write(unsigned char value) {
+	csr_writel(value, 0xe0004848L);
+}
+#define CSR_USB_EP_1_IN_EV_ENABLE_ADDR 0xe000484cL
+#define CSR_USB_EP_1_IN_EV_ENABLE_SIZE 1
+static inline unsigned char usb_ep_1_in_ev_enable_read(void) {
+	unsigned char r = csr_readl(0xe000484cL);
+	return r;
+}
+static inline void usb_ep_1_in_ev_enable_write(unsigned char value) {
+	csr_writel(value, 0xe000484cL);
+}
+#define CSR_USB_EP_1_IN_LAST_TOK_ADDR 0xe0004850L
+#define CSR_USB_EP_1_IN_LAST_TOK_SIZE 1
+static inline unsigned char usb_ep_1_in_last_tok_read(void) {
+	unsigned char r = csr_readl(0xe0004850L);
+	return r;
+}
+#define CSR_USB_EP_1_IN_RESPOND_ADDR 0xe0004854L
+#define CSR_USB_EP_1_IN_RESPOND_SIZE 1
+static inline unsigned char usb_ep_1_in_respond_read(void) {
+	unsigned char r = csr_readl(0xe0004854L);
+	return r;
+}
+static inline void usb_ep_1_in_respond_write(unsigned char value) {
+	csr_writel(value, 0xe0004854L);
+}
+#define CSR_USB_EP_1_IN_DTB_ADDR 0xe0004858L
+#define CSR_USB_EP_1_IN_DTB_SIZE 1
+static inline unsigned char usb_ep_1_in_dtb_read(void) {
+	unsigned char r = csr_readl(0xe0004858L);
+	return r;
+}
+static inline void usb_ep_1_in_dtb_write(unsigned char value) {
+	csr_writel(value, 0xe0004858L);
+}
+#define CSR_USB_EP_1_IN_IBUF_HEAD_ADDR 0xe000485cL
+#define CSR_USB_EP_1_IN_IBUF_HEAD_SIZE 1
+static inline unsigned char usb_ep_1_in_ibuf_head_read(void) {
+	unsigned char r = csr_readl(0xe000485cL);
+	return r;
+}
+static inline void usb_ep_1_in_ibuf_head_write(unsigned char value) {
+	csr_writel(value, 0xe000485cL);
+}
+#define CSR_USB_EP_1_IN_IBUF_EMPTY_ADDR 0xe0004860L
+#define CSR_USB_EP_1_IN_IBUF_EMPTY_SIZE 1
+static inline unsigned char usb_ep_1_in_ibuf_empty_read(void) {
+	unsigned char r = csr_readl(0xe0004860L);
+	return r;
+}
+#define CSR_USB_EP_2_OUT_EV_STATUS_ADDR 0xe0004864L
+#define CSR_USB_EP_2_OUT_EV_STATUS_SIZE 1
+static inline unsigned char usb_ep_2_out_ev_status_read(void) {
+	unsigned char r = csr_readl(0xe0004864L);
+	return r;
+}
+static inline void usb_ep_2_out_ev_status_write(unsigned char value) {
+	csr_writel(value, 0xe0004864L);
+}
+#define CSR_USB_EP_2_OUT_EV_PENDING_ADDR 0xe0004868L
+#define CSR_USB_EP_2_OUT_EV_PENDING_SIZE 1
+static inline unsigned char usb_ep_2_out_ev_pending_read(void) {
+	unsigned char r = csr_readl(0xe0004868L);
+	return r;
+}
+static inline void usb_ep_2_out_ev_pending_write(unsigned char value) {
+	csr_writel(value, 0xe0004868L);
+}
+#define CSR_USB_EP_2_OUT_EV_ENABLE_ADDR 0xe000486cL
+#define CSR_USB_EP_2_OUT_EV_ENABLE_SIZE 1
+static inline unsigned char usb_ep_2_out_ev_enable_read(void) {
+	unsigned char r = csr_readl(0xe000486cL);
+	return r;
+}
+static inline void usb_ep_2_out_ev_enable_write(unsigned char value) {
+	csr_writel(value, 0xe000486cL);
+}
+#define CSR_USB_EP_2_OUT_LAST_TOK_ADDR 0xe0004870L
+#define CSR_USB_EP_2_OUT_LAST_TOK_SIZE 1
+static inline unsigned char usb_ep_2_out_last_tok_read(void) {
+	unsigned char r = csr_readl(0xe0004870L);
+	return r;
+}
+#define CSR_USB_EP_2_OUT_RESPOND_ADDR 0xe0004874L
+#define CSR_USB_EP_2_OUT_RESPOND_SIZE 1
+static inline unsigned char usb_ep_2_out_respond_read(void) {
+	unsigned char r = csr_readl(0xe0004874L);
+	return r;
+}
+static inline void usb_ep_2_out_respond_write(unsigned char value) {
+	csr_writel(value, 0xe0004874L);
+}
+#define CSR_USB_EP_2_OUT_DTB_ADDR 0xe0004878L
+#define CSR_USB_EP_2_OUT_DTB_SIZE 1
+static inline unsigned char usb_ep_2_out_dtb_read(void) {
+	unsigned char r = csr_readl(0xe0004878L);
+	return r;
+}
+static inline void usb_ep_2_out_dtb_write(unsigned char value) {
+	csr_writel(value, 0xe0004878L);
+}
+#define CSR_USB_EP_2_OUT_OBUF_HEAD_ADDR 0xe000487cL
+#define CSR_USB_EP_2_OUT_OBUF_HEAD_SIZE 1
+static inline unsigned char usb_ep_2_out_obuf_head_read(void) {
+	unsigned char r = csr_readl(0xe000487cL);
+	return r;
+}
+static inline void usb_ep_2_out_obuf_head_write(unsigned char value) {
+	csr_writel(value, 0xe000487cL);
+}
+#define CSR_USB_EP_2_OUT_OBUF_EMPTY_ADDR 0xe0004880L
+#define CSR_USB_EP_2_OUT_OBUF_EMPTY_SIZE 1
+static inline unsigned char usb_ep_2_out_obuf_empty_read(void) {
+	unsigned char r = csr_readl(0xe0004880L);
+	return r;
+}
+#define CSR_USB_EP_2_IN_EV_STATUS_ADDR 0xe0004884L
+#define CSR_USB_EP_2_IN_EV_STATUS_SIZE 1
+static inline unsigned char usb_ep_2_in_ev_status_read(void) {
+	unsigned char r = csr_readl(0xe0004884L);
+	return r;
+}
+static inline void usb_ep_2_in_ev_status_write(unsigned char value) {
+	csr_writel(value, 0xe0004884L);
+}
+#define CSR_USB_EP_2_IN_EV_PENDING_ADDR 0xe0004888L
+#define CSR_USB_EP_2_IN_EV_PENDING_SIZE 1
+static inline unsigned char usb_ep_2_in_ev_pending_read(void) {
+	unsigned char r = csr_readl(0xe0004888L);
+	return r;
+}
+static inline void usb_ep_2_in_ev_pending_write(unsigned char value) {
+	csr_writel(value, 0xe0004888L);
+}
+#define CSR_USB_EP_2_IN_EV_ENABLE_ADDR 0xe000488cL
+#define CSR_USB_EP_2_IN_EV_ENABLE_SIZE 1
+static inline unsigned char usb_ep_2_in_ev_enable_read(void) {
+	unsigned char r = csr_readl(0xe000488cL);
+	return r;
+}
+static inline void usb_ep_2_in_ev_enable_write(unsigned char value) {
+	csr_writel(value, 0xe000488cL);
+}
+#define CSR_USB_EP_2_IN_LAST_TOK_ADDR 0xe0004890L
+#define CSR_USB_EP_2_IN_LAST_TOK_SIZE 1
+static inline unsigned char usb_ep_2_in_last_tok_read(void) {
+	unsigned char r = csr_readl(0xe0004890L);
+	return r;
+}
+#define CSR_USB_EP_2_IN_RESPOND_ADDR 0xe0004894L
+#define CSR_USB_EP_2_IN_RESPOND_SIZE 1
+static inline unsigned char usb_ep_2_in_respond_read(void) {
+	unsigned char r = csr_readl(0xe0004894L);
+	return r;
+}
+static inline void usb_ep_2_in_respond_write(unsigned char value) {
+	csr_writel(value, 0xe0004894L);
+}
+#define CSR_USB_EP_2_IN_DTB_ADDR 0xe0004898L
+#define CSR_USB_EP_2_IN_DTB_SIZE 1
+static inline unsigned char usb_ep_2_in_dtb_read(void) {
+	unsigned char r = csr_readl(0xe0004898L);
+	return r;
+}
+static inline void usb_ep_2_in_dtb_write(unsigned char value) {
+	csr_writel(value, 0xe0004898L);
+}
+#define CSR_USB_EP_2_IN_IBUF_HEAD_ADDR 0xe000489cL
+#define CSR_USB_EP_2_IN_IBUF_HEAD_SIZE 1
+static inline unsigned char usb_ep_2_in_ibuf_head_read(void) {
+	unsigned char r = csr_readl(0xe000489cL);
+	return r;
+}
+static inline void usb_ep_2_in_ibuf_head_write(unsigned char value) {
+	csr_writel(value, 0xe000489cL);
+}
+#define CSR_USB_EP_2_IN_IBUF_EMPTY_ADDR 0xe00048a0L
+#define CSR_USB_EP_2_IN_IBUF_EMPTY_SIZE 1
+static inline unsigned char usb_ep_2_in_ibuf_empty_read(void) {
+	unsigned char r = csr_readl(0xe00048a0L);
+	return r;
+}
+#define CSR_USB_ADDRESS_ADDR 0xe00048a4L
+#define CSR_USB_ADDRESS_SIZE 1
+static inline unsigned char usb_address_read(void) {
+	unsigned char r = csr_readl(0xe00048a4L);
+	return r;
+}
+static inline void usb_address_write(unsigned char value) {
+	csr_writel(value, 0xe00048a4L);
+}
+
+/* version */
+#define CSR_VERSION_BASE 0xe0007000L
+#define CSR_VERSION_MAJOR_ADDR 0xe0007000L
+#define CSR_VERSION_MAJOR_SIZE 1
+static inline unsigned char version_major_read(void) {
+	unsigned char r = csr_readl(0xe0007000L);
+	return r;
+}
+#define CSR_VERSION_MINOR_ADDR 0xe0007004L
+#define CSR_VERSION_MINOR_SIZE 1
+static inline unsigned char version_minor_read(void) {
+	unsigned char r = csr_readl(0xe0007004L);
+	return r;
+}
+#define CSR_VERSION_REVISION_ADDR 0xe0007008L
+#define CSR_VERSION_REVISION_SIZE 1
+static inline unsigned char version_revision_read(void) {
+	unsigned char r = csr_readl(0xe0007008L);
+	return r;
+}
+#define CSR_VERSION_GITREV_ADDR 0xe000700cL
+#define CSR_VERSION_GITREV_SIZE 4
+static inline unsigned int version_gitrev_read(void) {
+	unsigned int r = csr_readl(0xe000700cL);
+	r <<= 8;
+	r |= csr_readl(0xe0007010L);
+	r <<= 8;
+	r |= csr_readl(0xe0007014L);
+	r <<= 8;
+	r |= csr_readl(0xe0007018L);
+	return r;
+}
+#define CSR_VERSION_GITEXTRA_ADDR 0xe000701cL
+#define CSR_VERSION_GITEXTRA_SIZE 2
+static inline unsigned short int version_gitextra_read(void) {
+	unsigned short int r = csr_readl(0xe000701cL);
+	r <<= 8;
+	r |= csr_readl(0xe0007020L);
+	return r;
+}
+#define CSR_VERSION_DIRTY_ADDR 0xe0007024L
+#define CSR_VERSION_DIRTY_SIZE 1
+static inline unsigned char version_dirty_read(void) {
+	unsigned char r = csr_readl(0xe0007024L);
+	return r;
+}
+#define CSR_VERSION_MODEL_ADDR 0xe0007028L
+#define CSR_VERSION_MODEL_SIZE 1
+static inline unsigned char version_model_read(void) {
+	unsigned char r = csr_readl(0xe0007028L);
+	return r;
+}
+
+/* constants */
+#define TIMER0_INTERRUPT 0
+static inline int timer0_interrupt_read(void) {
+	return 0;
+}
+#define USB_INTERRUPT 3
+static inline int usb_interrupt_read(void) {
+	return 3;
+}
+#define CSR_DATA_WIDTH 8
+static inline int csr_data_width_read(void) {
+	return 8;
+}
+#define SYSTEM_CLOCK_FREQUENCY 12000000
+static inline int system_clock_frequency_read(void) {
+	return 12000000;
+}
+#define CONFIG_BITSTREAM_SYNC_HEADER1 2123999870
+static inline int config_bitstream_sync_header1_read(void) {
+	return 2123999870;
+}
+#define CONFIG_BITSTREAM_SYNC_HEADER2 2125109630
+static inline int config_bitstream_sync_header2_read(void) {
+	return 2125109630;
+}
+#define CONFIG_CLOCK_FREQUENCY 12000000
+static inline int config_clock_frequency_read(void) {
+	return 12000000;
+}
+#define CONFIG_CPU_RESET_ADDR 0
+static inline int config_cpu_reset_addr_read(void) {
+	return 0;
+}
+#define CONFIG_CPU_TYPE "VEXRISCV"
+static inline const char * config_cpu_type_read(void) {
+	return "VEXRISCV";
+}
+#define CONFIG_CPU_VARIANT "VEXRISCV"
+static inline const char * config_cpu_variant_read(void) {
+	return "VEXRISCV";
+}
+#define CONFIG_CSR_DATA_WIDTH 8
+static inline int config_csr_data_width_read(void) {
+	return 8;
+}
+#define CONFIG_FOMU_REV "HACKER"
+static inline const char * config_fomu_rev_read(void) {
+	return "HACKER";
+}
+#define CONFIG_FOMU_REV_HACKER 1
+static inline int config_fomu_rev_hacker_read(void) {
+	return 1;
+}
+
+#endif