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164 Commits 12 Branches 31 Tags 6.5 MiB
78d861d14a
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38 Commits

Author SHA1 Message Date
Sean Cross
78d861d14a hw: foboot-bitstream: add gpios for touch pads 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-21 21:46:29 +08:00
Sean Cross
4b16e24c9a hw: add csr for cpu reset address, and add full endpoint suite 
Add all endpoints so we can have either a serial port or a mass storage
device.

Also add a CSR to allow us to set the reset address of the CPU.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-20 00:06:10 +08:00
Sean Cross
91a205fe2c Merge branch 'master' of github.com:im-tomu/foboot into wishbone-debug 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-18 21:35:20 +08:00
Sean Cross
f8f2ec638f hw: foboot-bitstream: add usb to debug options 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-18 21:32:50 +08:00
Sean Cross
3b809e70f7 hw: minor text cleanup on foboot-bitstream 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-11 15:48:24 +08:00
Sean Cross
ddff12cd02 hw: fix spi so code execution works 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-11 13:23:44 +08:00
Sean Cross
9cb4e4a8ce WIP: riscv boot 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-11 09:40:28 +08:00
Sean Cross
cf574019a0 hw: remove obsolete call to icemulti 
We make our images from scratch.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-11 09:38:44 +08:00
Sean Cross
acb4b998da hw: add another boot image 
Still trying to decide on the image order.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-11 09:38:09 +08:00
Sean Cross
3a51f55ee7 hw: foboot-bitstream: replace bbspi with picorvspi 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-10 16:44:05 +08:00
Sean Cross
7774fdd7e7 hw: fomu_flash: add spi controller from picorv32 
This controller supports many features, including bit-bang mode and
memory-mapped access.  It should replace the previous module
entirely.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-10 16:42:59 +08:00
Sean Cross
63f5dc75de hw: foboot-bitstream: add an option to build with no cpu 
Building with no CPU is faster, and can be very handy for debugging
various hardware blocks when using litex_server.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-10 16:41:17 +08:00
Sean Cross
d89eea3934 usb: refactor state machine to work with xhci devices 
Due to some subtle quirks, as well as a poorly-implemented state machine,
foboot was not compatible with many Desktop devices.

This should fix the implementation so that it is more compatible.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-08 17:19:54 +08:00
Sean Cross
5f7cd9d2ab foboot-bitstream: disable pll by default, add -with-dsp option 
Disable building the PLL by default.  While we're at it, add
an argument to attempt to infer the DSP.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-07 06:27:13 +01:00
Sean Cross
c0df98f66e hw: correct crystal pin for Hacker board 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-06 17:08:01 +08:00
Sean Cross
6d9028f505 hw: foboot-bitstream: create multiboot image after build 
This fixes an issue where the directory wasn't created first.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-06 16:19:30 +08:00
Sean Cross
7ee97214e6 foboot-bitstream: generate multiboot and print helpful message 
Generate a multiboot version of the bitstream image.  While we're at it,
print a helpful message indicating what each output image is.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-06 11:07:39 +08:00
Sean Cross
2a7e431947 hw: foboot-bitstream: support building bios 
Now that the failsafe bios has stabilized, support building it as part
of the ROM.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-06 09:42:29 +08:00
Sean Cross
6435aec3db foboot-bitstream: add hacker revision 
Untested commit -- this should add support for the Hacker version of the
PCB.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-05 18:58:19 +08:00
Sean Cross
db65ccc199 hw: document warmboot some more 
Realized that there are 5 images and not 4.  With this, everything
works as it should.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-05 17:34:10 +08:00
Sean Cross
c33d86adb9 foboot-bitstream: fix warmboot and add rgb block 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-02 18:11:58 +08:00
Sean Cross
8599ec7007 hw: bitstream: simplify command line argument parsing 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-02 13:03:47 +08:00
Sean Cross
2fd01b8303 foboot-bitstream: more help description, add dvt support 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-01 10:09:20 +08:00
Sean Cross
7191c12490 wip: just need to get WARMBOOT working 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-28 11:11:36 +08:00
Sean Cross
3d6acaf51e sw: wip commit -- getting dfu working 
Now that we have SPI and USB both working, we can start to close the
loop and get DFU working.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-25 17:39:06 +08:00
Sean Cross
23b9962067 hw: foboot-bitstream: remove pmod debug comments 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-20 13:12:53 +08:00
Sean Cross
fa690d63ed hw: foboot-bitstream: clean up debug generation 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-20 13:12:29 +08:00
Sean Cross
4f0507fc77 hw: foboot-bitstream: remove "generating firmware" message 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-20 13:12:08 +08:00
Sean Cross
f3d779787b hw: foboot-bitstream: add reset to usb_48 
This is required to meet timing.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-20 13:11:45 +08:00
Sean Cross
b09333f023 hw: add spi and new vexriscv to foboot 
This is the beginning of having SPI.

Also add a new two-stage pipeline.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-20 11:25:09 +08:00
Sean Cross
2d7c7794f5 hw: foboot-bitstream: remove debug pins, use epfifo 
Remove the debug pins to let timing close.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-10 21:06:37 +08:00
Sean Cross
0c6e444789 hw: foboot-bitstream: add -relut and friends to nextpnr 
Shrink the resulting gate count by adding -relut and adjusting the
number of luts that a CE signal can use.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-10 21:05:51 +08:00
Sean Cross
8aed600cd6 hw: foboot-bitstream: specify additional clock domain constraints 
Specify all the clock domain constraints for every possible signal, to
work around the fact that nextpnr currently will pick one and ignore the
rest.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-10 21:05:12 +08:00
Sean Cross
6638801886 hw: foboot-bitstream: remove clk48_in signal 
It's unused.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-10 21:04:19 +08:00
Sean Cross
8fb6b5977b hw: foboot-bitstream: remove unused clk48 net 
We only use the raw and usb48 nets.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-10 20:53:58 +08:00
Sean Cross
d603113b6f foboot-bitstream: send clk48 through shifter, then through pll 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-08 20:47:42 +08:00
Sean Cross
3df59a866d metastable fix: wip 
Trying to figure out what's causing this problem.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-05 20:28:54 +08:00
Sean Cross
8fe27d9371 Add 'hw/' from commit 'd812378c4d61f7c957ac4bcba15a8344fb7fb458' 
git-subtree-dir: hw
git-subtree-mainline: e4af98b4aa
git-subtree-split: d812378c4d
 2019-03-05 09:05:50 +08:00