Sean Cross
8faf9dbec5
sw: remove printf
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There is no UART in the failsafe bootloader, so remove printf.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-22 11:42:44 +08:00
Sean Cross
f36dde5c7e
swp: remove swapfile
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This got added somehow.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-22 11:20:09 +08:00
Sean Cross
722aee37d9
hw: foboot-bitstream: don't reuse touchpad for WP on hacker
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We needed to pick a random, unused pin for "wp" on the Hacker board.
Unfortunately, I picked a pin that's used by the touchpads. Pick a
different unused pin.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-22 10:03:48 +08:00
Sean Cross
29640c5a92
examples: usb-cdcacm: add missing thirdparty files
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-21 21:51:20 +08:00
Sean Cross
4e5c75a0df
deps: valentyusb: use debug port fix
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-21 21:50:52 +08:00
Sean Cross
698ea6c2f7
deps: litex: sync upstream for litex_server changes
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-21 21:49:31 +08:00
Sean Cross
c0690187b4
Merge branch 'wishbone-debug'
2019-04-21 21:48:33 +08:00
Sean Cross
eb6fa89452
merge debug
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-21 21:48:16 +08:00
Sean Cross
78d861d14a
hw: foboot-bitstream: add gpios for touch pads
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-21 21:46:29 +08:00
Sean Cross
0fce77fb21
examples: add usb-cdcacm example
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This tests that multiple endpoints work as we expect.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-21 21:44:37 +08:00
Sean Cross
aef5043db0
deps: litex: use latest upstream branch
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This contains the usb patches, as well as vexriscv reset patch.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-20 08:55:24 +08:00
Sean Cross
4b16e24c9a
hw: add csr for cpu reset address, and add full endpoint suite
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Add all endpoints so we can have either a serial port or a mass storage
device.
Also add a CSR to allow us to set the reset address of the CPU.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-20 00:06:10 +08:00
Sean Cross
91a205fe2c
Merge branch 'master' of github.com:im-tomu/foboot into wishbone-debug
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-18 21:35:20 +08:00
Sean Cross
e7184d9243
no changes
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-18 21:34:39 +08:00
Sean Cross
f8f2ec638f
hw: foboot-bitstream: add usb to debug options
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-18 21:32:50 +08:00
Sean Cross
4b34dced9d
Merge branch 'riscv-dfu-boot' of github.com:im-tomu/foboot into riscv-dfu-boot
2019-04-18 21:31:37 +08:00
Sean Cross
7eaad24d50
deps: valentyusb: use wishbone-debug branch
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-18 21:30:45 +08:00
Sean Cross
bfd1ddc957
sw: update csr definition for bios
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 15:57:36 +08:00
Sean Cross
faf431dd58
hw: fix tests line endings
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 15:54:06 +08:00
Sean Cross
92bf1ff546
doc: fix line endings
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 15:53:37 +08:00
Sean Cross
e5a2b29456
sw: fix line endings
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 15:53:08 +08:00
Sean Cross
f30fbce79f
gitignore: ignore all elf, bin, and hex files
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 15:51:23 +08:00
Sean Cross
3b809e70f7
hw: minor text cleanup on foboot-bitstream
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 15:48:24 +08:00
Sean Cross
35d4333c13
examples: riscv-blink: first working iteration
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 15:17:03 +08:00
Sean Cross
ddff12cd02
hw: fix spi so code execution works
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 13:23:44 +08:00
Sean Cross
9144b767a8
sw: fix line endings
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 11:48:57 +08:00
Sean Cross
482708d6fb
sw: spi: remove broken, unused Write command
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The Write command was from fomu-flash, and didn't properly erase the
required sectors. This wasn't an issue, because it is entirely unused.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 11:47:10 +08:00
Sean Cross
e69429fb0c
gitattributes: try fixing lf/crlf issue
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We should only use lf, since that's all Linux understands.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 10:41:23 +08:00
Sean Cross
9e8bcc3350
lxbuildenv: convert to unix line endings
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This should have been done a while ago.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 10:34:35 +08:00
Sean Cross
d8821dff99
example: add riscv example
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Still experimental. It'll probably move later.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 09:58:22 +08:00
Sean Cross
9cb4e4a8ce
WIP: riscv boot
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 09:40:28 +08:00
Sean Cross
cf574019a0
hw: remove obsolete call to icemulti
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We make our images from scratch.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 09:38:44 +08:00
Sean Cross
acb4b998da
hw: add another boot image
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Still trying to decide on the image order.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 09:38:09 +08:00
Sean Cross
0bcc45b185
sw: update to use picospi
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Use the new picospi instead of bbspi.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-10 17:02:02 +08:00
Sean Cross
3a51f55ee7
hw: foboot-bitstream: replace bbspi with picorvspi
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-10 16:44:05 +08:00
Sean Cross
7774fdd7e7
hw: fomu_flash: add spi controller from picorv32
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This controller supports many features, including bit-bang mode and
memory-mapped access. It should replace the previous module
entirely.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-10 16:42:59 +08:00
Sean Cross
63f5dc75de
hw: foboot-bitstream: add an option to build with no cpu
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Building with no CPU is faster, and can be very handy for debugging
various hardware blocks when using litex_server.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-10 16:41:17 +08:00
Sean Cross
d89eea3934
usb: refactor state machine to work with xhci devices
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Due to some subtle quirks, as well as a poorly-implemented state machine,
foboot was not compatible with many Desktop devices.
This should fix the implementation so that it is more compatible.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-08 17:19:54 +08:00
Sean Cross
20c0fb2b2b
valentyusb: revert shorter-pipeline patch
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It didn't seem to fix anything, and may have made things worse.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-07 22:57:05 +08:00
Sean Cross
239aa660ef
documentation: update readme and license
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Update the LICENSE file to Apache 2.0.
Modify README.md to include information for the end-user.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-07 13:47:29 +08:00
Sean Cross
5f7cd9d2ab
foboot-bitstream: disable pll by default, add -with-dsp option
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Disable building the PLL by default. While we're at it, add
an argument to attempt to infer the DSP.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-07 06:27:13 +01:00
Sean Cross
595be29063
sw: Makefile: use 32-bit riscv compiler on rpi
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The rpi image does not have a 64-bit riscv compiler. Use the
32-bit version of the toolchain if we detect we're on an rpi.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-07 04:55:13 +01:00
Sean Cross
c0df98f66e
hw: correct crystal pin for Hacker board
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-06 17:08:01 +08:00
Sean Cross
6d9028f505
hw: foboot-bitstream: create multiboot image after build
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This fixes an issue where the directory wasn't created first.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-06 16:19:30 +08:00
Sean Cross
7ee97214e6
foboot-bitstream: generate multiboot and print helpful message
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Generate a multiboot version of the bitstream image. While we're at it,
print a helpful message indicating what each output image is.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-06 11:07:39 +08:00
Sean Cross
4b6ad47705
sw: spi-gpio: remove unused files
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These were moved into spi.c to allow them to be inlined.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-06 11:04:43 +08:00
Sean Cross
91a23d808c
sw: Makefile: fix third_party and package naming
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With these changes, litex mode should now work.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-06 10:51:08 +08:00
Sean Cross
2a7e431947
hw: foboot-bitstream: support building bios
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Now that the failsafe bios has stabilized, support building it as part
of the ROM.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-06 09:42:29 +08:00
Sean Cross
a9a5f0cc0d
sw: minor removal of unused code
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-06 09:35:50 +08:00
Sean Cross
d6ae51f69b
sw: ld: add support for litex build
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Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-06 09:35:23 +08:00