foboot/hw/rtl/2-stage-1024-cache-debug.yaml
Sean Cross d3dd349848 Revert "hw: rtl: use only one hw breakpoint"
With an older litex build, we have enough space for four breakpoints
in the vexriscv core.

This reverts commit 2464b510fa.
2019-07-22 08:51:18 +08:00

6 lines
202 B
YAML

debug: !!vexriscv.DebugReport {hardwareBreakpointCount: 4}
iBus: !!vexriscv.BusReport
flushInstructions: [4111, 19, 19, 19]
info: !!vexriscv.CacheReport {bytePerLine: 32, size: 1024}
kind: cached