mirror of
https://github.com/im-tomu/foboot.git
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245 lines
8.0 KiB
C
245 lines
8.0 KiB
C
#ifndef __USB_EPTRI_H_
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#define __USB_EPTRI_H_
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#ifdef CSR_ACCESSORS_DEFINED
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extern void csr_writeb(uint8_t value, unsigned long addr);
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extern uint8_t csr_readb(unsigned long addr);
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extern void csr_writew(uint16_t value, unsigned long addr);
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extern uint16_t csr_readw(unsigned long addr);
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extern void csr_writel(uint32_t value, unsigned long addr);
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extern uint32_t csr_readl(unsigned long addr);
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#else /* ! CSR_ACCESSORS_DEFINED */
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#include <hw/common.h>
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#endif /* ! CSR_ACCESSORS_DEFINED */
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#define CSR_USB_BASE 0xe0004800L
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#define CSR_USB_PULLUP_OUT_ADDR 0xe0004800L
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#define CSR_USB_PULLUP_OUT_SIZE 1
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static inline unsigned char usb_pullup_out_read(void) {
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unsigned char r = csr_readl(0xe0004800L);
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return r;
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}
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static inline void usb_pullup_out_write(unsigned char value) {
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csr_writel(value, 0xe0004800L);
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}
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#define CSR_USB_ADDRESS_ADDR 0xe0004804L
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#define CSR_USB_ADDRESS_SIZE 1
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static inline unsigned char usb_address_read(void) {
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unsigned char r = csr_readl(0xe0004804L);
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return r;
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}
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static inline void usb_address_write(unsigned char value) {
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csr_writel(value, 0xe0004804L);
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}
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#define CSR_USB_ADDRESS_ADDR_OFFSET 0
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#define CSR_USB_ADDRESS_ADDR_SIZE 7
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#define CSR_USB_NEXT_EV_ADDR 0xe0004808L
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#define CSR_USB_NEXT_EV_SIZE 1
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static inline unsigned char usb_next_ev_read(void) {
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unsigned char r = csr_readl(0xe0004808L);
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return r;
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}
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#define CSR_USB_NEXT_EV_IN_OFFSET 0
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#define CSR_USB_NEXT_EV_IN_SIZE 1
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#define CSR_USB_NEXT_EV_OUT_OFFSET 1
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#define CSR_USB_NEXT_EV_OUT_SIZE 1
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#define CSR_USB_NEXT_EV_SETUP_OFFSET 2
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#define CSR_USB_NEXT_EV_SETUP_SIZE 1
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#define CSR_USB_NEXT_EV_RESET_OFFSET 3
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#define CSR_USB_NEXT_EV_RESET_SIZE 1
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#define CSR_USB_SETUP_DATA_ADDR 0xe000480cL
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#define CSR_USB_SETUP_DATA_SIZE 1
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static inline unsigned char usb_setup_data_read(void) {
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unsigned char r = csr_readl(0xe000480cL);
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return r;
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}
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#define CSR_USB_SETUP_DATA_DATA_OFFSET 0
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#define CSR_USB_SETUP_DATA_DATA_SIZE 8
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#define CSR_USB_SETUP_CTRL_ADDR 0xe0004810L
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#define CSR_USB_SETUP_CTRL_SIZE 1
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static inline unsigned char usb_setup_ctrl_read(void) {
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unsigned char r = csr_readl(0xe0004810L);
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return r;
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}
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static inline void usb_setup_ctrl_write(unsigned char value) {
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csr_writel(value, 0xe0004810L);
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}
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#define CSR_USB_SETUP_CTRL_RESET_OFFSET 5
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#define CSR_USB_SETUP_CTRL_RESET_SIZE 1
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#define CSR_USB_SETUP_STATUS_ADDR 0xe0004814L
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#define CSR_USB_SETUP_STATUS_SIZE 1
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static inline unsigned char usb_setup_status_read(void) {
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unsigned char r = csr_readl(0xe0004814L);
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return r;
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}
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#define CSR_USB_SETUP_STATUS_EPNO_OFFSET 0
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#define CSR_USB_SETUP_STATUS_EPNO_SIZE 4
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#define CSR_USB_SETUP_STATUS_HAVE_OFFSET 4
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#define CSR_USB_SETUP_STATUS_HAVE_SIZE 1
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#define CSR_USB_SETUP_STATUS_PEND_OFFSET 5
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#define CSR_USB_SETUP_STATUS_PEND_SIZE 1
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#define CSR_USB_SETUP_STATUS_IS_IN_OFFSET 6
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#define CSR_USB_SETUP_STATUS_IS_IN_SIZE 1
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#define CSR_USB_SETUP_STATUS_DATA_OFFSET 7
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#define CSR_USB_SETUP_STATUS_DATA_SIZE 1
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#define CSR_USB_SETUP_EV_STATUS_ADDR 0xe0004818L
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#define CSR_USB_SETUP_EV_STATUS_SIZE 1
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static inline unsigned char usb_setup_ev_status_read(void) {
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unsigned char r = csr_readl(0xe0004818L);
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return r;
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}
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static inline void usb_setup_ev_status_write(unsigned char value) {
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csr_writel(value, 0xe0004818L);
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}
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#define CSR_USB_SETUP_EV_PENDING_ADDR 0xe000481cL
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#define CSR_USB_SETUP_EV_PENDING_SIZE 1
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static inline unsigned char usb_setup_ev_pending_read(void) {
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unsigned char r = csr_readl(0xe000481cL);
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return r;
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}
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static inline void usb_setup_ev_pending_write(unsigned char value) {
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csr_writel(value, 0xe000481cL);
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}
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#define CSR_USB_SETUP_EV_ENABLE_ADDR 0xe0004820L
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#define CSR_USB_SETUP_EV_ENABLE_SIZE 1
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static inline unsigned char usb_setup_ev_enable_read(void) {
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unsigned char r = csr_readl(0xe0004820L);
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return r;
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}
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static inline void usb_setup_ev_enable_write(unsigned char value) {
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csr_writel(value, 0xe0004820L);
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}
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#define CSR_USB_IN_DATA_ADDR 0xe0004824L
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#define CSR_USB_IN_DATA_SIZE 1
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static inline unsigned char usb_in_data_read(void) {
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unsigned char r = csr_readl(0xe0004824L);
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return r;
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}
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static inline void usb_in_data_write(unsigned char value) {
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csr_writel(value, 0xe0004824L);
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}
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#define CSR_USB_IN_DATA_DATA_OFFSET 0
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#define CSR_USB_IN_DATA_DATA_SIZE 8
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#define CSR_USB_IN_CTRL_ADDR 0xe0004828L
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#define CSR_USB_IN_CTRL_SIZE 1
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static inline unsigned char usb_in_ctrl_read(void) {
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unsigned char r = csr_readl(0xe0004828L);
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return r;
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}
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static inline void usb_in_ctrl_write(unsigned char value) {
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csr_writel(value, 0xe0004828L);
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}
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#define CSR_USB_IN_CTRL_EPNO_OFFSET 0
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#define CSR_USB_IN_CTRL_EPNO_SIZE 4
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#define CSR_USB_IN_CTRL_RESET_OFFSET 5
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#define CSR_USB_IN_CTRL_RESET_SIZE 1
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#define CSR_USB_IN_CTRL_STALL_OFFSET 6
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#define CSR_USB_IN_CTRL_STALL_SIZE 1
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#define CSR_USB_IN_STATUS_ADDR 0xe000482cL
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#define CSR_USB_IN_STATUS_SIZE 1
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static inline unsigned char usb_in_status_read(void) {
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unsigned char r = csr_readl(0xe000482cL);
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return r;
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}
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#define CSR_USB_IN_STATUS_IDLE_OFFSET 0
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#define CSR_USB_IN_STATUS_IDLE_SIZE 1
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#define CSR_USB_IN_STATUS_HAVE_OFFSET 4
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#define CSR_USB_IN_STATUS_HAVE_SIZE 1
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#define CSR_USB_IN_STATUS_PEND_OFFSET 5
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#define CSR_USB_IN_STATUS_PEND_SIZE 1
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#define CSR_USB_IN_EV_STATUS_ADDR 0xe0004830L
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#define CSR_USB_IN_EV_STATUS_SIZE 1
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static inline unsigned char usb_in_ev_status_read(void) {
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unsigned char r = csr_readl(0xe0004830L);
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return r;
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}
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static inline void usb_in_ev_status_write(unsigned char value) {
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csr_writel(value, 0xe0004830L);
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}
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#define CSR_USB_IN_EV_PENDING_ADDR 0xe0004834L
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#define CSR_USB_IN_EV_PENDING_SIZE 1
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static inline unsigned char usb_in_ev_pending_read(void) {
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unsigned char r = csr_readl(0xe0004834L);
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return r;
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}
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static inline void usb_in_ev_pending_write(unsigned char value) {
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csr_writel(value, 0xe0004834L);
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}
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#define CSR_USB_IN_EV_ENABLE_ADDR 0xe0004838L
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#define CSR_USB_IN_EV_ENABLE_SIZE 1
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static inline unsigned char usb_in_ev_enable_read(void) {
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unsigned char r = csr_readl(0xe0004838L);
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return r;
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}
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static inline void usb_in_ev_enable_write(unsigned char value) {
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csr_writel(value, 0xe0004838L);
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}
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#define CSR_USB_OUT_DATA_ADDR 0xe000483cL
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#define CSR_USB_OUT_DATA_SIZE 1
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static inline unsigned char usb_out_data_read(void) {
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unsigned char r = csr_readl(0xe000483cL);
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return r;
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}
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#define CSR_USB_OUT_DATA_DATA_OFFSET 0
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#define CSR_USB_OUT_DATA_DATA_SIZE 8
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#define CSR_USB_OUT_CTRL_ADDR 0xe0004840L
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#define CSR_USB_OUT_CTRL_SIZE 1
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static inline unsigned char usb_out_ctrl_read(void) {
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unsigned char r = csr_readl(0xe0004840L);
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return r;
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}
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static inline void usb_out_ctrl_write(unsigned char value) {
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csr_writel(value, 0xe0004840L);
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}
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#define CSR_USB_OUT_CTRL_EPNO_OFFSET 0
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#define CSR_USB_OUT_CTRL_EPNO_SIZE 4
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#define CSR_USB_OUT_CTRL_ENABLE_OFFSET 4
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#define CSR_USB_OUT_CTRL_ENABLE_SIZE 1
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#define CSR_USB_OUT_CTRL_RESET_OFFSET 5
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#define CSR_USB_OUT_CTRL_RESET_SIZE 1
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#define CSR_USB_OUT_CTRL_STALL_OFFSET 6
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#define CSR_USB_OUT_CTRL_STALL_SIZE 1
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#define CSR_USB_OUT_STATUS_ADDR 0xe0004844L
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#define CSR_USB_OUT_STATUS_SIZE 1
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static inline unsigned char usb_out_status_read(void) {
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unsigned char r = csr_readl(0xe0004844L);
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return r;
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}
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#define CSR_USB_OUT_STATUS_EPNO_OFFSET 0
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#define CSR_USB_OUT_STATUS_EPNO_SIZE 4
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#define CSR_USB_OUT_STATUS_HAVE_OFFSET 4
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#define CSR_USB_OUT_STATUS_HAVE_SIZE 1
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#define CSR_USB_OUT_STATUS_PEND_OFFSET 5
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#define CSR_USB_OUT_STATUS_PEND_SIZE 1
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#define CSR_USB_OUT_EV_STATUS_ADDR 0xe0004848L
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#define CSR_USB_OUT_EV_STATUS_SIZE 1
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static inline unsigned char usb_out_ev_status_read(void) {
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unsigned char r = csr_readl(0xe0004848L);
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return r;
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}
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static inline void usb_out_ev_status_write(unsigned char value) {
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csr_writel(value, 0xe0004848L);
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}
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#define CSR_USB_OUT_EV_PENDING_ADDR 0xe000484cL
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#define CSR_USB_OUT_EV_PENDING_SIZE 1
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static inline unsigned char usb_out_ev_pending_read(void) {
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unsigned char r = csr_readl(0xe000484cL);
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return r;
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}
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static inline void usb_out_ev_pending_write(unsigned char value) {
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csr_writel(value, 0xe000484cL);
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}
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#define CSR_USB_OUT_EV_ENABLE_ADDR 0xe0004850L
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#define CSR_USB_OUT_EV_ENABLE_SIZE 1
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static inline unsigned char usb_out_ev_enable_read(void) {
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unsigned char r = csr_readl(0xe0004850L);
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return r;
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}
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static inline void usb_out_ev_enable_write(unsigned char value) {
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csr_writel(value, 0xe0004850L);
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}
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#define USB_INTERRUPT 3
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#endif /* __USB_EPTRI_H_ */
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