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move 'verilog/pcf' to root

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umarcor 2020-10-05 08:21:59 +02:00
parent ab04edaac1
commit 2776953012
6 changed files with 7 additions and 7 deletions
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0
verilog/pcf/fomu-evt2.pcf → pcf/fomu-evt2.pcf
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verilog/pcf/fomu-evt3.pcf → pcf/fomu-evt3.pcf
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verilog/pcf/fomu-hacker.pcf → pcf/fomu-hacker.pcf
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verilog/pcf/fomu-pvt.pcf → pcf/fomu-pvt.pcf
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2
verilog/blink-expanded/Makefile
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@ -9,7 +9,7 @@ NEXTPNR ?= nextpnr-ice40
YOSYS ?= yosys
ICEPACK ?= icepack
PCF_PATH ?= ../pcf
PCF_PATH ?= ../../pcf
# Add Windows and Unix support
RM = rm -rf

12
verilog/blink/Makefile
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@ -8,19 +8,19 @@
# Configuration is performed by setting the environment variable FOMU_REV accordingly.
ifeq ($(FOMU_REV),evt1)
YOSYSFLAGS?= -D EVT=1
PNRFLAGS ?= --up5k --package sg48 --pcf ../pcf/fomu-evt2.pcf
PNRFLAGS ?= --up5k --package sg48 --pcf ../../pcf/fomu-evt2.pcf
else ifeq ($(FOMU_REV),evt2)
YOSYSFLAGS?= -D EVT=1
PNRFLAGS ?= --up5k --package sg48 --pcf ../pcf/fomu-evt2.pcf
PNRFLAGS ?= --up5k --package sg48 --pcf ../../pcf/fomu-evt2.pcf
else ifeq ($(FOMU_REV),evt3)
YOSYSFLAGS?= -D EVT=1
PNRFLAGS ?= --up5k --package sg48 --pcf ../pcf/fomu-evt3.pcf
PNRFLAGS ?= --up5k --package sg48 --pcf ../../pcf/fomu-evt3.pcf
else ifeq ($(FOMU_REV),hacker)
YOSYSFLAGS?= -D HACKER=1
PNRFLAGS ?= --up5k --package uwg30 --pcf ../pcf/fomu-hacker.pcf
PNRFLAGS ?= --up5k --package uwg30 --pcf ../../pcf/fomu-hacker.pcf
else ifeq ($(FOMU_REV),pvt)
YOSYSFLAGS?= -D PVT=1
PNRFLAGS ?= --up5k --package uwg30 --pcf ../pcf/fomu-pvt.pcf
PNRFLAGS ?= --up5k --package uwg30 --pcf ../../pcf/fomu-pvt.pcf
else
$(error Unrecognized FOMU_REV value. must be "evt1", "evt2", "evt3", "pvt", or "hacker")
endif
@ -40,7 +40,7 @@ blink.json: blink.v
# Use **nextpnr** to generate the FPGA configuration.
# This is called the **place** and **route** step.
blink.asc: blink.json ../pcf/fomu-hacker.pcf
blink.asc: blink.json
nextpnr-ice40 \
$(PNRFLAGS) \
--json blink.json \