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Fixing Makefile for Verilog examples.

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This commit is contained in:
Tim 'mithro' Ansell 2020-01-03 14:21:19 +00:00
parent 53f019252b
commit d439e55506
4 changed files with 25 additions and 35 deletions
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11
verilog/blink-basic/Makefile
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@ -3,11 +3,12 @@
# This Makefile shows the steps to generate an DFU loadable image onto
# Fomu hacker board.
# Default target.
all: blink.dfu
@true
.DEFAULT: all
# Use *Yosys* generate the synthesized netlist
# This is called the **synthesis** and **tech mapping** step.
blink.json: blink.v
@ -15,8 +16,12 @@ blink.json: blink.v
# Use **nextpnr** generate the FPGA configuration.
# This is called the **place** and **route** step.
blink.asc: blink.json blink.pcf
nextpnr-ice40 --up5k --package uwg30 --json blink.json --pcf blink.pcf --asc blink.asc
blink.asc: blink.json ../pcf/fomu-hacker.pcf
nextpnr-ice40 \
--up5k --package uwg30 \
--pcf ../pcf/fomu-hacker.pcf \
--json blink.json \
--asc blink.asc
# Use icepack to convert the FPGA configuration into a "bitstream" loadable onto the FPGA.
# This is called the bitstream generation step.

16
verilog/blink-basic/blink.pcf
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@ -1,16 +0,0 @@
# Configuration for the Fomu hacker board.
set_io rgb0 A5 # Blue LED
set_io rgb1 B5 # Green LED
set_io rgb2 C5 # Red LED
set_io clki F5 # Clock input from 48MHz Oscillator
set_io spi_mosi F1 # SPI Master Out, Slave In Pin
set_io spi_miso E1 # SPI Master In, Slave Out Pin
set_io spi_clk D1 # SPI Master Clock Output Pin
set_io spi_cs C1 # SPI Chip Select
set_io user_1 F4 # User touch pad 1
set_io user_2 E5 # User touch pad 2
set_io user_3 E4 # User touch pad 3
set_io user_4 F2 # User touch pad 4
set_io usb_dn A2 # USB D- pad
set_io usb_dp A4 # USB D+ pad
set_io usb_dp_pu D5 # USB D+ pull up (indicates device connected)

2
verilog/blink-expanded/Makefile
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@ -9,7 +9,7 @@ NEXTPNR ?= nextpnr-ice40
YOSYS ?= yosys
ICEPACK ?= icepack
PCF_PATH ?= pcf
PCF_PATH ?= ../pcf
# Add Windows and Unix support
RM = rm -rf

31
verilog/pcf/fomu-hacker.pcf
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@ -1,15 +1,16 @@
set_io rgb0 A5
set_io rgb1 B5
set_io rgb2 C5
set_io clki F5
set_io spi_mosi F1
set_io spi_miso E1
set_io spi_clk D1
set_io spi_cs C1
set_io user_1 F4
set_io user_2 E5
set_io user_3 E4
set_io user_4 F2
set_io usb_dn A2
set_io usb_dp A4
set_io usb_dp_pu D5
# Configuration for the Fomu hacker board.
set_io rgb0 A5 # Blue LED
set_io rgb1 B5 # Green LED
set_io rgb2 C5 # Red LED
set_io clki F5 # Clock input from 48MHz Oscillator
set_io spi_mosi F1 # SPI Master Out, Slave In Pin
set_io spi_miso E1 # SPI Master In, Slave Out Pin
set_io spi_clk D1 # SPI Master Clock Output Pin
set_io spi_cs C1 # SPI Chip Select
set_io user_1 F4 # User touch pad 1
set_io user_2 E5 # User touch pad 2
set_io user_3 E4 # User touch pad 3
set_io user_4 F2 # User touch pad 4
set_io usb_dn A2 # USB D- pad
set_io usb_dp A4 # USB D+ pad
set_io usb_dp_pu D5 # USB D+ pull up (indicates device connected)