Commit Graph

80 Commits

Author SHA1 Message Date
umarcor
906e77e1e2 readme: fix workshop.fomu-im shield 2021-09-20 14:23:32 +02:00
umarcor
1056bf4a72 readme: fix hdl links, list subdirs icestudio, migen and risc-rust-blink 2021-07-05 14:29:13 +02:00
umarcor
b2601169f6 add mixed-hdl/blink 2020-10-12 19:58:46 +02:00
umarcor
21bcde2bd3 add vhdl/blink 2020-10-12 18:48:52 +02:00
umarcor
6716b7246f readme: add shields/badges, move 'Development' sections to a separated file 2020-10-10 14:05:18 +02:00
umarcor
f1b487dd23 readme: requirements step to local build 2020-10-05 05:13:38 +02:00
umarcor
1b1e85dfdd readme: fix list spacing 2020-10-05 05:13:14 +02:00
umarcor
a33eee4f94 sphinxcontrib-verilog-diagrams was renamed to sphinxcontrib-hdl-diagrams 2020-10-05 05:00:50 +02:00
Daniel Lim Wee Soong
c4c7a56c63 Fix link to sphinx_materialdesign_theme
Signed-off-by: Daniel Lim Wee Soong <weesoong.lim@gmail.com>
2020-04-27 10:44:32 +08:00
Robert Mibus
c57eda7b1f Split up the documentation build instructions to make them easier to follow 2020-02-22 11:43:45 +11:00
Tim 'mithro' Ansell
53f019252b Adding example output. 2020-01-03 13:55:40 +00:00
Tim 'mithro' Ansell
9a046efa1d Moving the images under the docs/_static directory. 2020-01-03 13:55:40 +00:00
Tim 'mithro' Ansell
c338a1d654 Clean up the README file. 2020-01-03 13:55:35 +00:00
Pascal Mainini
47fa080ac0 add link to generated headers, minor fixes 2020-01-03 02:58:02 +01:00
Pascal Mainini
219c7e1dae remove description for old cdcacm example 2019-12-30 01:31:23 +01:00
Pascal Mainini
053fae0060
Add description for building TinyUSB example (#1) 2019-12-30 01:13:37 +01:00
Tim 'mithro' Ansell
050aee4cc4 Fix text color.
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
2019-12-25 19:01:14 +01:00
Tim 'mithro' Ansell
ec5e41709f Adding annotated parts diagram of Fomu hardware.
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
2019-12-25 19:00:43 +01:00
Tim 'mithro' Ansell
294a99abda Making the hacker verse PVT distinction clearer.
* Adding PVT images.
 * Converting to a table.
 * Putting required hardware first in the requirements section.
 * Move EVT support into a note.
 * Start using `FOMU_REV` flag.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
2019-12-25 18:35:14 +01:00
Michael Gielda
8e000c8328
README: Add info on precompiled binaries
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 08:55:29 -08:00
Michael Gielda
5ec1c5b3df
Renode fomu workshop (#67)
README: Add Renode section of tutorial

Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 08:35:04 -08:00
Michael Gielda
5d3296c60f README: fix bold in explanation of HDL
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 04:33:59 -08:00
Michael Gielda
a02b3b3784 README: delete leftover leading whitespace
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 04:33:20 -08:00
Michael Gielda
9b46e6135c README: refer in text to preceding image
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 04:32:47 -08:00
Michael Gielda
fa3dc7764a README: fix broken image caption
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 04:32:10 -08:00
Michael Gielda
7481bd9e8f README: say SPI flash instead of SPI
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 04:31:27 -08:00
Michael Gielda
161ff3f645 README: some clarification what RISC-V softcore we mean
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 04:30:31 -08:00
Michael Gielda
d40c4927ed README: explain modules mean MicroPython modules
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 04:28:50 -08:00
Michael Gielda
6de3ecdcdc README: format one paragraph more consistently
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 04:08:00 -08:00
Michael Gielda
370bb5f1de README: explain what MicroPython is, with link
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 04:07:22 -08:00
Michael Gielda
218cc0fcfd README: fix capitalization of RAM
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 03:58:31 -08:00
Michael Gielda
f51618d758 README: explain softcore
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 03:56:35 -08:00
Michael Gielda
1bbce0c65f README: standardize around ICE40
In reality it's iCE40, but it's confusing, so all caps is probably fine;
fixed one inconsistency.

Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 03:49:08 -08:00
Michael Gielda
548cb96477 README: fix broken sentence
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 03:44:38 -08:00
Michael Gielda
489eb68ea3 README: Add explanation of what DFU on first use
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 03:38:42 -08:00
Sean Cross
081e539e60 README: add a note about extra DFU devices
Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-25 15:55:42 +08:00
Sean Cross
6dc410dd42 README: rename riscv-blink.bin to riscv-blink.dfu
There is no reason for users to laod riscv-blink.bin anymore, since
the dfu is strictly better and avoids warnings.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-25 15:43:56 +08:00
Mike Walters
85f4018408 README: Update riscv-blink patch for latest source 2019-11-22 10:43:44 +00:00
Sean Cross
b918f51b58 README: litex: update workshop.py description
The files have changed significantly, and are much simpler.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-09-02 18:43:17 +08:00
Sean Cross
22b37ce441 hacker: use smaller images
Signed-off-by: Sean Cross <sean@xobs.io>
2019-09-01 00:32:26 +08:00
Tobias Gruetzmacher
4a26b1c477 Add some pictures of the Fomu Hacker 2019-08-31 00:57:04 +02:00
Sean Cross
60b9b46c54 README: minor edits to formatting and yosys output
Signed-off-by: Sean Cross <sean@xobs.io>
2019-08-28 12:21:23 +08:00
Sean Cross
ea224a1c97 README: add yosys output, add required files
In addition to the toolchain software, users also need the workshop
files.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-08-28 12:16:30 +08:00
Sean Cross
13e5a7a968 README: fix cmd.exe %PATH -> %PATH%
Signed-off-by: Sean Cross <sean@xobs.io>
2019-08-27 10:50:41 +08:00
Sean Cross
1362f34249 README: dfu-util.exe -> dfu-util
Signed-off-by: Sean Cross <sean@xobs.io>
2019-08-25 18:08:13 +02:00
Tim 'mithro' Ansell
b5c15ef642 Add the DFU suffix inside the workshop.py script.
Update the instructions to use the new `top.dfu`.
2019-08-23 14:14:16 +02:00
Tim 'mithro' Ansell
79e7a6dd91 Add note about submodules. 2019-08-23 13:37:51 +02:00
Tim 'mithro' Ansell
10c0ee26de Adding more sections. 2019-08-23 13:35:16 +02:00
Tim 'mithro' Ansell
5d1fad11f1 Adding table of contents. 2019-08-23 10:04:05 +02:00
Tim 'mithro' Ansell
4a25eb88ff Lots of style improvements. 2019-08-23 09:50:01 +02:00