Commit Graph

412 Commits

Author SHA1 Message Date
Michael Gielda
7481bd9e8f README: say SPI flash instead of SPI
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 04:31:27 -08:00
Michael Gielda
161ff3f645 README: some clarification what RISC-V softcore we mean
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 04:30:31 -08:00
Michael Gielda
d40c4927ed README: explain modules mean MicroPython modules
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 04:28:50 -08:00
Michael Gielda
6de3ecdcdc README: format one paragraph more consistently
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 04:08:00 -08:00
Michael Gielda
370bb5f1de README: explain what MicroPython is, with link
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 04:07:22 -08:00
Michael Gielda
218cc0fcfd README: fix capitalization of RAM
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 03:58:31 -08:00
Michael Gielda
f51618d758 README: explain softcore
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 03:56:35 -08:00
Michael Gielda
1bbce0c65f README: standardize around ICE40
In reality it's iCE40, but it's confusing, so all caps is probably fine;
fixed one inconsistency.

Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 03:49:08 -08:00
Michael Gielda
548cb96477 README: fix broken sentence
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 03:44:38 -08:00
Michael Gielda
489eb68ea3 README: Add explanation of what DFU on first use
Signed-off-by: Michael Gielda <mgielda@antmicro.com>
2019-12-12 03:38:42 -08:00
Sean Cross
081e539e60 README: add a note about extra DFU devices
Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-25 15:55:42 +08:00
Sean Cross
6dc410dd42 README: rename riscv-blink.bin to riscv-blink.dfu
There is no reason for users to laod riscv-blink.bin anymore, since
the dfu is strictly better and avoids warnings.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-25 15:43:56 +08:00
Sean Cross
74dbc8ec37 riscv-blink: foboot-2 compatibility
Add compatibility with eptri, which is present on foboot-2.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-23 10:36:55 +00:00
Sean Cross
777c0a959d
Merge pull request #64 from miek/patch-2
README: Update riscv-blink patch for latest source
2019-11-22 18:49:06 +08:00
Mike Walters
85f4018408 README: Update riscv-blink patch for latest source 2019-11-22 10:43:44 +00:00
Sean Cross
71ae462366
Merge pull request #63 from miek/patch-1
riscv-blink: Remove blink rate override
2019-11-21 19:02:01 -08:00
Mike Walters
f9950c5ab7
riscv-blink: Remove blink rate override 2019-11-21 17:05:56 -08:00
Sean Cross
f1c001499e LICENSE: add Apache-2.0 license to this repository
This repository and all code within is licensed under the Apache-2.0
license.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-14 10:43:36 -08:00
Sean Cross
e64417cfb1 litex: litex_boards: sync with master to fix import issue
The previous version of `litex_boards` was unable to import certain
packages without setuptools, due to unrelated imports being included.

This latest version fixes that issue, and allows for the fomu-toolchain
to work with the `litex_boards` repo.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-10-23 00:06:22 +08:00
Sean Cross
3a96d67339 litex: enable git updating for workshop and workshop_rgb
Having `skip-git` is useful for workshops, where we might not have good
Internet access.  However, it's better to keep it enabled for general
use.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-10-23 00:05:09 +08:00
Sean Cross
79283a9562
Merge pull request #60 from bobwmcgrath/master
added defines to avoid missing compiler directive error
2019-09-27 16:02:31 +08:00
bob mcgrath
531ee5c90c
added defines to avoid missing compiler directive error 2019-09-27 07:54:05 +00:00
bob mcgrath
1dee3c9acd
Update blink.v 2019-09-27 07:52:59 +00:00
bob mcgrath
0e6ba75e13
Update blink.v 2019-09-27 07:50:17 +00:00
Sean Cross
9c07e29795
Merge pull request #57 from GNUtoo/master
riscv-usb-cdcacm: Makefile: use CROSS_COMPILE instead of TRGT
2019-09-16 23:15:46 +08:00
Denis 'GNUtoo' Carikli
08df0ecf70
riscv-usb-cdcacm: Makefile: use CROSS_COMPILE instead of TRGT
The CROSS_COMPILE variable is widely used among free and open
source projects like Linux, u-boot, etc.

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
2019-09-16 16:34:08 +02:00
Sean Cross
b9a4638e5d
Merge pull request #56 from GNUtoo/master
riscv-blink: Makefile: use CROSS_COMPILE instead of TRGT
2019-09-15 09:21:45 +08:00
Denis 'GNUtoo' Carikli
13db507770
riscv-blink: Makefile: use CROSS_COMPILE instead of TRGT
The CROSS_COMPILE variable is widely used among free and open
source projects like Linux, u-boot, etc.

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
2019-09-14 16:42:11 +02:00
Sean Cross
b918f51b58 README: litex: update workshop.py description
The files have changed significantly, and are much simpler.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-09-02 18:43:17 +08:00
Sean Cross
90ef5da2c0 litex: simplify designs using litex_boards
Now that we have good default upstream boards, use these to simplify the
workshop files.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-09-02 18:42:32 +08:00
Sean Cross
7df108d105 litex: sync with upstream litex
This ends up saving 0.5% LUTs, and keeps us up to date.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-09-02 18:41:35 +08:00
Sean Cross
07095519e6 litex: litex_boards: use upstream with fomu target
The upstream of `litex_boards` now has a `fomu` target that we can use,
including a `_CRG` that works and a usable `BaseSoC`.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-09-02 18:37:39 +08:00
Sean Cross
6cab25ca58 litex: remove lxsocsupport
Everything from lxsocsupport is now upstream.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-09-02 18:33:46 +08:00
Sean Cross
d091cad4d3 reference: fix pdf files for evt,prod schematic
We had accidentally committed HTML files rather than PDF files.

This fixes #54.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-09-02 11:31:24 +08:00
Sean Cross
22b37ce441 hacker: use smaller images
Signed-off-by: Sean Cross <sean@xobs.io>
2019-09-01 00:32:26 +08:00
Sean Cross
3430f7146c Revert "img: shrink images to 72 dpi"
This reverts commit 0ca121562d.
2019-09-01 00:29:06 +08:00
Sean Cross
0ca121562d img: shrink images to 72 dpi
Just do this as an experiment to see if it makes them fit on the page
better.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-09-01 00:25:54 +08:00
Sean Cross
d2a1c747be
Merge pull request #53 from TobiX/board-pictures
Add some pictures of the Fomu Hacker
2019-08-31 20:40:07 +08:00
Tobias Gruetzmacher
4a26b1c477 Add some pictures of the Fomu Hacker 2019-08-31 00:57:04 +02:00
Sean Cross
60b9b46c54 README: minor edits to formatting and yosys output
Signed-off-by: Sean Cross <sean@xobs.io>
2019-08-28 12:21:23 +08:00
Sean Cross
ea224a1c97 README: add yosys output, add required files
In addition to the toolchain software, users also need the workshop
files.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-08-28 12:16:30 +08:00
Sean Cross
059e44a04b riscv-blink: fix usb stack
This appears to work now.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-08-28 07:29:50 +08:00
Sean Cross
a0d1e62ba2 riscv-blink: ld: add ramtext section to .data
Signed-off-by: Sean Cross <sean@xobs.io>
2019-08-28 07:22:24 +08:00
Sean Cross
19541ae43d riscv-blink: commit latest csr.h
This includes the usb address fields, which are present on 1.9+.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-08-28 07:20:28 +08:00
Sean Cross
f6639c64cc riscv-blink: disable "leave USB connected" mode
This doesn't appear to work on certain builds of Linux.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-08-28 07:19:29 +08:00
Sean Cross
cbdcd33bc8 verilog-blink: fix note about overvolting the led
It's actually the red LED that gets overvolted.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-08-28 05:25:25 +08:00
Sean Cross
ba03f6b5d9 riscv-blink: Makefile: create riscv-blink.dfu
Signed-off-by: Sean Cross <sean@xobs.io>
2019-08-28 05:22:25 +08:00
Sean Cross
ff1fc52f5c verilog-blink: create blink.dfu
Signed-off-by: Sean Cross <sean@xobs.io>
2019-08-28 05:22:13 +08:00
Sean Cross
17d6c605a0 verilog-blink: simplify verilog file
This removes a lot of the cruft that came from using `blink.v` as
a test case early on in development.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-08-28 05:21:36 +08:00
Sean Cross
51cd59ac7a riscv-blink: fix alignment for rodata
The rodata segment wasn't properly aligned, which was causing
an exception during runtime initialization.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-08-28 05:11:05 +08:00