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18 lines
391 B
Plaintext
18 lines
391 B
Plaintext
# Verilog/SystemVerilog generated from src/Blink.scala
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/Blink.sv
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/Blink.v
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# Annotations for the firrtl compiler, also generated from src/Blink.scala
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/Blink.anno.json
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# Intermediate representation of the circuit generated from src/Blink.scala
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/Blink.fir
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# IntelliJ IDE folder
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/.idea/
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# Scala build artifacts
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target/
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# same as for the verilog example
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blink.json
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blink.asc
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blink.bit
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blink.dfu
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