fomu-workshop/hdl/verilog/blink
2021-07-05 14:29:12 +02:00
..
.gitignore create subdir 'hdl' 2021-05-19 16:24:52 +02:00
blink.v create subdir 'hdl' 2021-05-19 16:24:52 +02:00
Makefile hdl: add PnR_Prog.mk 2021-07-05 14:29:12 +02:00
README.md create subdir 'hdl' 2021-05-19 16:24:52 +02:00

Minimal Verilog Example

A minimal Verilog example which simply blinks the RGB LEDs at different frequencies.

Using

Type make to build the DFU image. Type make load to load the DFU image onto the Fomu board. Type make clean to remove all the generated files.