<areashape="rect"id="node1"href="group__ports.html"title="Ports"alt=""coords="7,56,52,83"/><areashape="rect"id="node2"href="group___s_t_m8___d_r_i_v_e_r_s.html"title="Device drivers included in the STM8 support."alt=""coords="228,5,313,32"/><areashape="rect"id="node3"href="group___s_t_m8___c_o_n_f.html"title="STM8 Configuration Options."alt=""coords="208,56,333,83"/><areashape="rect"id="node4"href="group___s_t_m8___c_o_r_e.html"title="STM8 specific port code, structures and macros."alt=""coords="201,107,340,133"/></map>
<p>The ChibiOS/RT logical <aclass="el"href="concepts.html#system_states">System States</a> are mapped as follow in the STM8 port:</p>
<ul>
<li><b>Init</b>. This state is represented by the startup code and the initialization code before <code><aclass="el"href="group__system.html#gafe2c7de6567e98e487e009e81e3be10b"title="ChibiOS/RT initialization.">chSysInit()</a></code> is executed. It has not a special hardware state associated.</li>
<li><b>Normal</b>. This is the state the system has after executing <code><aclass="el"href="group__system.html#gafe2c7de6567e98e487e009e81e3be10b"title="ChibiOS/RT initialization.">chSysInit()</a></code>. Interrupts are enabled.</li>
<li><b>Suspended</b>. Interrupts are disabled.</li>
<li><b>Disabled</b>. Interrupts are disabled. This state is equivalent to the Suspended state because there are no fast interrupts in this architecture.</li>
<li><b>Sleep</b>. Implemented with "wait" instruction insertion in the idle loop.</li>
<li><b>S-Locked</b>. Interrupts are disabled.</li>
<li><b>I-Locked</b>. This state is equivalent to the SRI state, the <code>chSysLockI()</code> and <code>chSysUnlockI()</code> APIs do nothing (still use them in order to formally change state because this may change).</li>
<li><b>Serving Regular Interrupt</b>. Normal interrupt service code.</li>
<li><b>Serving Fast Interrupt</b>. Not present in this architecture.</li>
<li><b>Serving Non-Maskable Interrupt</b>. The STM8 ha non maskable interrupt sources that can be associated to this state.</li>
<li><b>Halted</b>. Implemented as an infinite loop with interrupts disabled.</li>
<li>The STM8 does not have a dedicated interrupt stack, make sure to reserve enough stack space for interrupts in each thread stack. This can be done by modifying the <code>INT_REQUIRED_STACK</code> macro into <b>./os/ports/RC/STM8/chcore.h</b>.</li>
<li>The kernel currently supports only the small memory model so the kernel files should be loaded in the first 64K. Note that this is not a problem because upper addresses can be used by the user code, the kernel can context switch code running there.</li>
<li>The configuration option <code>CH_OPTIMIZE_SPEED</code> is not currently supported because the missing support of the <code>inline</code> "C" keyword in the compiler.</li>
<tr><tdclass="memItemLeft"align="right"valign="top"> </td><tdclass="memItemRight"valign="bottom"><aclass="el"href="group___s_t_m8___c_o_r_e.html">Core Port Implementation</a></td></tr>
<p><tr><tdclass="mdescLeft"> </td><tdclass="mdescRight"><p>STM8 specific port code, structures and macros. </p>
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