<p>This module defines an abstract interface for digital I/O ports. Note that most I/O ports functions are just macros. The macros have default software implementations that can be redefined in a <aclass="el"href="group___p_a_l___l_l_d.html">PAL Low Level Driver</a> if the target hardware supports special features like, as example, atomic bit set/reset/masking. Please refer to the ports specific documentation for details.<br/>
The <aclass="el"href="group___p_a_l.html">PAL Driver</a> has the advantage to make the access to the I/O ports platform independent and still be optimized for the specific architectures.<br/>
Note that the <aclass="el"href="group___p_a_l___l_l_d.html">PAL Low Level Driver</a> may also offer non standard macro and functions in order to support specific features but, of course, the use of such interfaces would not be portable. Such interfaces shall be marked with the architecture name inside the function names.</p>
<h2>Implementation Rules</h2>
<p>In implementing an <aclass="el"href="group___p_a_l___l_l_d.html">PAL Low Level Driver</a> there are some rules/behaviors that should be respected.</p>
<h3>Writing on input pads</h3>
<p>The behavior is not specified but there are implementations better than others, this is the list of possible implementations, preferred options are on top:</p>
<oltype="1">
<li>The written value is not actually output but latched, should the pads be reprogrammed as outputs the value would be in effect.</li>
<li>The write operation is ignored.</li>
<li>The write operation has side effects, as example disabling/enabling pull up/down resistors or changing the pad direction. This scenario is discouraged, please try to avoid this scenario.</li>
</ol>
<h3>Reading from output pads</h3>
<p>The behavior is not specified but there are implementations better than others, this is the list of possible implementations, preferred options are on top:</p>
<oltype="1">
<li>The actual pads states are read (not the output latch).</li>
<li>The output latch value is read (regardless of the actual pads states).</li>
<li>Unspecified, please try to avoid this scenario.</li>
</ol>
<h3>Writing unused or unimplemented port bits</h3>
<p>The behavior is not specified.</p>
<h3>Reading from unused or unimplemented port bits</h3>
<p>The behavior is not specified.</p>
<h3>Reading or writing on pins associated to other functionalities</h3>
<p>The behavior is not specified.</p>
<h2>Usage</h2>
<p>The use of I/O ports requires the inclusion of the header file <code><aclass="el"href="pal_8h.html"title="I/O Ports Abstraction Layer macros, types and structures.">pal.h</a></code>, this file is not automatically included <code><aclass="el"href="ch_8h.html"title="ChibiOS/RT main include file.">ch.h</a></code> like the other header files. </p>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Bits in a mode word dedicated as mode selector. <ahref="#ga75a61e666497d9486a2d0495a2ad9e83"></a><br/></td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Safe state for <b>unconnected</b> pads. <ahref="#ga688f69ad947fc020c9d3840b542e1958"></a><br/></td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Input pad with weak pull up resistor. <ahref="#gadb37ffcbe38167c0642f7618f0d5b398"></a><br/></td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Input pad with weak pull down resistor. <ahref="#ga0b2c436c6b72194e8c81f92c4e8c0312"></a><br/></td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Data part of a static I/O bus initializer. <ahref="#ga9b2ca125fccdac75e7513b597f3a4a39"></a><br/></td></tr>
<tr><tdclass="memItemLeft"align="right"valign="top">#define </td><tdclass="memItemRight"valign="bottom"><aclass="el"href="group___p_a_l.html#ga94861905a3eda098da30009d710fb176">IOBUS_DECL</a>(name, port, width, offset) <aclass="el"href="struct_i_o_bus.html">IOBus</a> name = _IOBUS_DATA(name, port, width, offset)</td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Static I/O bus initializer. <ahref="#ga94861905a3eda098da30009d710fb176"></a><br/></td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Reads the physical I/O port states. <ahref="#gaf9df3944b1ef206cce8c42ba5de5e3f9"></a><br/></td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Writes a bits mask on a I/O port. <ahref="#ga7b6d3c589c78f451bc9e1fb080222e71"></a><br/></td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Sets a bits mask on a I/O port. <ahref="#gafd09c5ce655dd5daf9b39cd5f842e422"></a><br/></td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Clears a bits mask on a I/O port. <ahref="#ga5ff3b75aeb4fcd1cb82f451f952ab9a9"></a><br/></td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Toggles a bits mask on a I/O port. <ahref="#ga55408d900323e7dd43c0fa83337de7ba"></a><br/></td></tr>
<tr><tdclass="memItemLeft"align="right"valign="top">#define </td><tdclass="memItemRight"valign="bottom"><aclass="el"href="group___p_a_l.html#gad286cfdb9f088a7c8e5085d19ac728d3">palReadGroup</a>(port, mask, offset) ((palReadPort(port) >> (offset)) & (mask))</td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Reads a group of bits. <ahref="#gad286cfdb9f088a7c8e5085d19ac728d3"></a><br/></td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Pads group mode setup. <ahref="#ga24789efd90288773d2f928458d1dc6e5"></a><br/></td></tr>
<tr><tdclass="memItemLeft"align="right"valign="top">#define </td><tdclass="memItemRight"valign="bottom"><aclass="el"href="group___p_a_l.html#ga06917ae7f34a92d3a04be8e9364dcfbf">palReadPad</a>(port, pad) ((palReadPort(port) >> (pad)) & 1)</td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Reads an input pad logical state. <ahref="#ga06917ae7f34a92d3a04be8e9364dcfbf"></a><br/></td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Writes a logical state on an output pad. <ahref="#ga1b2ea64780d20f11eedaeb34c5b42daa"></a><br/></td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Sets a pad logical state to <code>PAL_HIGH</code>. <ahref="#gaf2c820c1657afa77cdce398329baaf68"></a><br/></td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Clears a pad logical state to <code>PAL_LOW</code>. <ahref="#ga4dce65e0515a349a06bea353f2303286"></a><br/></td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Toggles a pad logical state. <ahref="#ga76b4f6024add76681d618f5ac7daeedf"></a><br/></td></tr>
<tr><tdclass="mdescLeft"> </td><tdclass="mdescRight">Programs a bus with the specified mode. <ahref="#ga25ef645e442638716008408357f4ea59"></a><br/></td></tr>
<p>The state itself is not specified and is architecture dependent, it is guaranteed to be equal to the after-reset state. It is usually an input state. </p>
<p>Definition at line <aclass="el"href="pal_8h_source.html#l00057">57</a> of file <aclass="el"href="pal_8h_source.html">pal.h</a>.</p>
<p>The state itself is not specified and is architecture dependent, it may be mapped on <code>PAL_MODE_INPUT_PULLUP</code>, <code>PAL_MODE_INPUT_PULLDOWN</code> or <code>PAL_MODE_OUTPUT_PUSHPULL</code> as example. </p>
<p>Definition at line <aclass="el"href="pal_8h_source.html#l00066">66</a> of file <aclass="el"href="pal_8h_source.html">pal.h</a>.</p>
<p>Data part of a static I/O bus initializer. </p>
<p>This macro should be used when statically initializing an I/O bus that is part of a bigger structure.</p>
<dl><dt><b>Parameters:</b></dt><dd>
<tableborder="0"cellspacing="2"cellpadding="0">
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>name</em> </td><td>name of the <aclass="el"href="struct_i_o_bus.html"title="I/O bus descriptor.">IOBus</a> variable </td></tr>
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>port</em> </td><td>I/O port descriptor </td></tr>
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>width</em> </td><td>bus width in bits </td></tr>
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>offset</em> </td><td>bus bit offset within the port </td></tr>
</table>
</dd>
</dl>
<p>Definition at line <aclass="el"href="pal_8h_source.html#l00179">179</a> of file <aclass="el"href="pal_8h_source.html">pal.h</a>.</p>
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>name</em> </td><td>name of the <aclass="el"href="struct_i_o_bus.html"title="I/O bus descriptor.">IOBus</a> variable </td></tr>
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>port</em> </td><td>I/O port descriptor </td></tr>
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>width</em> </td><td>bus width in bits </td></tr>
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>offset</em> </td><td>bus bit offset within the port </td></tr>
</table>
</dd>
</dl>
<p>Definition at line <aclass="el"href="pal_8h_source.html#l00190">190</a> of file <aclass="el"href="pal_8h_source.html">pal.h</a>.</p>
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>config</em> </td><td>pointer to an architecture specific configuration structure. This structure is defined in the low level driver header. </td></tr>
</table>
</dd>
</dl>
<p>Definition at line <aclass="el"href="pal_8h_source.html#l00200">200</a> of file <aclass="el"href="pal_8h_source.html">pal.h</a>.</p>
<p>Referenced by <aclass="el"href="group___h_a_l.html#gafd89c1650df524d95aef39b8bc38170d">halInit()</a>.</p>
<aclass="code"href="group___p_a_l.html#ga7b6d3c589c78f451bc9e1fb080222e71"title="Writes a bits mask on a I/O port.">palWritePort</a>(port, <aclass="code"href="group___p_a_l.html#ga250da7237d3ccf872944d77d151fce24"title="Reads the output latch.">palReadLatch</a>(port) | (bits)); \
}
</pre></div>
<p>Sets a bits mask on a I/O port. </p>
<dlclass="note"><dt><b>Note:</b></dt><dd>The operation is not guaranteed to be atomic on all the architectures, for atomicity and/or portability reasons you may need to enclose port I/O operations between <code><aclass="el"href="group__system.html#ga9f6573c0763d1e4e97c63c62edad6e42"title="Enters the kernel lock mode.">chSysLock()</a></code> and <code><aclass="el"href="group__system.html#ga5a257fa58a09815eb64a45e2dfbdc22e"title="Leaves the kernel lock mode.">chSysUnlock()</a></code>. </dd>
<dd>
The default implementation is non atomic and not necessarily optimal. Low level drivers may optimize the function by using specific hardware or coding.</dd></dl>
<aclass="code"href="group___p_a_l.html#ga7b6d3c589c78f451bc9e1fb080222e71"title="Writes a bits mask on a I/O port.">palWritePort</a>(port, <aclass="code"href="group___p_a_l.html#ga250da7237d3ccf872944d77d151fce24"title="Reads the output latch.">palReadLatch</a>(port) & ~(bits)); \
}
</pre></div>
<p>Clears a bits mask on a I/O port. </p>
<dlclass="note"><dt><b>Note:</b></dt><dd>The operation is not guaranteed to be atomic on all the architectures, for atomicity and/or portability reasons you may need to enclose port I/O operations between <code><aclass="el"href="group__system.html#ga9f6573c0763d1e4e97c63c62edad6e42"title="Enters the kernel lock mode.">chSysLock()</a></code> and <code><aclass="el"href="group__system.html#ga5a257fa58a09815eb64a45e2dfbdc22e"title="Leaves the kernel lock mode.">chSysUnlock()</a></code>. </dd>
<dd>
The default implementation is non atomic and not necessarily optimal. Low level drivers may optimize the function by using specific hardware or coding.</dd></dl>
<aclass="code"href="group___p_a_l.html#ga7b6d3c589c78f451bc9e1fb080222e71"title="Writes a bits mask on a I/O port.">palWritePort</a>(port, <aclass="code"href="group___p_a_l.html#ga250da7237d3ccf872944d77d151fce24"title="Reads the output latch.">palReadLatch</a>(port) ^ (bits)); \
}
</pre></div>
<p>Toggles a bits mask on a I/O port. </p>
<dlclass="note"><dt><b>Note:</b></dt><dd>The operation is not guaranteed to be atomic on all the architectures, for atomicity and/or portability reasons you may need to enclose port I/O operations between <code><aclass="el"href="group__system.html#ga9f6573c0763d1e4e97c63c62edad6e42"title="Enters the kernel lock mode.">chSysLock()</a></code> and <code><aclass="el"href="group__system.html#ga5a257fa58a09815eb64a45e2dfbdc22e"title="Leaves the kernel lock mode.">chSysUnlock()</a></code>. </dd>
<dd>
The default implementation is non atomic and not necessarily optimal. Low level drivers may optimize the function by using specific hardware or coding.</dd></dl>
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>mask</em> </td><td>group mask, a logical AND is performed on the input data </td></tr>
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>offset</em> </td><td>group bit offset within the port </td></tr>
</table>
</dd>
</dl>
<dlclass="return"><dt><b>Returns:</b></dt><dd>The group logical states. </dd></dl>
<p>Definition at line <aclass="el"href="pal_8h_source.html#l00320">320</a> of file <aclass="el"href="pal_8h_source.html">pal.h</a>.</p>
<p>Referenced by <aclass="el"href="group___p_a_l.html#gac464cacee6890a3eab2e2db1b7d8d6f9">palReadBus()</a>.</p>
<aclass="code"href="group___p_a_l.html#ga7b6d3c589c78f451bc9e1fb080222e71"title="Writes a bits mask on a I/O port.">palWritePort</a>(port, (<aclass="code"href="group___p_a_l.html#ga250da7237d3ccf872944d77d151fce24"title="Reads the output latch.">palReadLatch</a>(port) & ~((mask) << (offset))) | \
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>mask</em> </td><td>group mask, a logical AND is performed on the output data </td></tr>
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>offset</em> </td><td>group bit offset within the port </td></tr>
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>bits</em> </td><td>bits to be written. Values exceeding the group width are masked. </td></tr>
</table>
</dd>
</dl>
<p>Definition at line <aclass="el"href="pal_8h_source.html#l00337">337</a> of file <aclass="el"href="pal_8h_source.html">pal.h</a>.</p>
<p>Referenced by <aclass="el"href="group___p_a_l.html#ga486b5ab6062e6a8f9d5efdd7a8908a79">palWriteBus()</a>.</p>
<dlclass="note"><dt><b>Note:</b></dt><dd>The default implementation not necessarily optimal. Low level drivers may optimize the function by using specific hardware or coding. </dd>
<dd>
The default implementation internally uses the <code><aclass="el"href="group___p_a_l.html#gaf9df3944b1ef206cce8c42ba5de5e3f9"title="Reads the physical I/O port states.">palReadPort()</a></code>.</dd></dl>
<aclass="code"href="group___p_a_l.html#ga7b6d3c589c78f451bc9e1fb080222e71"title="Writes a bits mask on a I/O port.">palWritePort</a>(port, (<aclass="code"href="group___p_a_l.html#ga250da7237d3ccf872944d77d151fce24"title="Reads the output latch.">palReadLatch</a>(port) & ~<aclass="code"href="group___p_a_l.html#ga7355801d0ad0c2dc5fd181115d899e74"title="Port bit helper macro.">PAL_PORT_BIT</a>(pad)) | \
(((bit) & 1) << pad)); \
}
</pre></div>
<p>Writes a logical state on an output pad. </p>
<dlclass="note"><dt><b>Note:</b></dt><dd>The operation is not guaranteed to be atomic on all the architectures, for atomicity and/or portability reasons you may need to enclose port I/O operations between <code><aclass="el"href="group__system.html#ga9f6573c0763d1e4e97c63c62edad6e42"title="Enters the kernel lock mode.">chSysLock()</a></code> and <code><aclass="el"href="group__system.html#ga5a257fa58a09815eb64a45e2dfbdc22e"title="Leaves the kernel lock mode.">chSysUnlock()</a></code>. </dd>
<dd>
The default implementation is non atomic and not necessarily optimal. Low level drivers may optimize the function by using specific hardware or coding. </dd>
<dd>
The default implementation internally uses the <code><aclass="el"href="group___p_a_l.html#ga250da7237d3ccf872944d77d151fce24"title="Reads the output latch.">palReadLatch()</a></code> and <code><aclass="el"href="group___p_a_l.html#ga7b6d3c589c78f451bc9e1fb080222e71"title="Writes a bits mask on a I/O port.">palWritePort()</a></code>.</dd></dl>
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>pad</em> </td><td>pad number within the port </td></tr>
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>bit</em> </td><td>logical value, the value must be <code>PAL_LOW</code> or <code>PAL_HIGH</code></td></tr>
</table>
</dd>
</dl>
<p>Definition at line <aclass="el"href="pal_8h_source.html#l00402">402</a> of file <aclass="el"href="pal_8h_source.html">pal.h</a>.</p>
<p>Sets a pad logical state to <code>PAL_HIGH</code>. </p>
<dlclass="note"><dt><b>Note:</b></dt><dd>The operation is not guaranteed to be atomic on all the architectures, for atomicity and/or portability reasons you may need to enclose port I/O operations between <code><aclass="el"href="group__system.html#ga9f6573c0763d1e4e97c63c62edad6e42"title="Enters the kernel lock mode.">chSysLock()</a></code> and <code><aclass="el"href="group__system.html#ga5a257fa58a09815eb64a45e2dfbdc22e"title="Leaves the kernel lock mode.">chSysUnlock()</a></code>. </dd>
<dd>
The default implementation is non atomic and not necessarily optimal. Low level drivers may optimize the function by using specific hardware or coding. </dd>
<dd>
The default implementation internally uses the <code><aclass="el"href="group___p_a_l.html#gafd09c5ce655dd5daf9b39cd5f842e422"title="Sets a bits mask on a I/O port.">palSetPort()</a></code>.</dd></dl>
<p>Clears a pad logical state to <code>PAL_LOW</code>. </p>
<dlclass="note"><dt><b>Note:</b></dt><dd>The operation is not guaranteed to be atomic on all the architectures, for atomicity and/or portability reasons you may need to enclose port I/O operations between <code><aclass="el"href="group__system.html#ga9f6573c0763d1e4e97c63c62edad6e42"title="Enters the kernel lock mode.">chSysLock()</a></code> and <code><aclass="el"href="group__system.html#ga5a257fa58a09815eb64a45e2dfbdc22e"title="Leaves the kernel lock mode.">chSysUnlock()</a></code>. </dd>
<dd>
The default implementation is non atomic and not necessarily optimal. Low level drivers may optimize the function by using specific hardware or coding. </dd>
<dd>
The default implementation internally uses the <code><aclass="el"href="group___p_a_l.html#ga5ff3b75aeb4fcd1cb82f451f952ab9a9"title="Clears a bits mask on a I/O port.">palClearPort()</a></code>.</dd></dl>
<dlclass="note"><dt><b>Note:</b></dt><dd>The operation is not guaranteed to be atomic on all the architectures, for atomicity and/or portability reasons you may need to enclose port I/O operations between <code><aclass="el"href="group__system.html#ga9f6573c0763d1e4e97c63c62edad6e42"title="Enters the kernel lock mode.">chSysLock()</a></code> and <code><aclass="el"href="group__system.html#ga5a257fa58a09815eb64a45e2dfbdc22e"title="Leaves the kernel lock mode.">chSysUnlock()</a></code>. </dd>
<dd>
The default implementation is non atomic and not necessarily optimal. Low level drivers may optimize the function by using specific hardware or coding. </dd>
<dd>
The default implementation internally uses the <code><aclass="el"href="group___p_a_l.html#ga55408d900323e7dd43c0fa83337de7ba"title="Toggles a bits mask on a I/O port.">palTogglePort()</a></code>.</dd></dl>
<p>This function programs a pad with the specified mode. </p>
<dlclass="note"><dt><b>Note:</b></dt><dd>The default implementation not necessarily optimal. Low level drivers may optimize the function by using specific hardware or coding. </dd>
<dd>
Programming an unknown or unsupported mode is silently ignored.</dd></dl>
<dlclass="note"><dt><b>Note:</b></dt><dd>The operation is not guaranteed to be atomic on all the architectures, for atomicity and/or portability reasons you may need to enclose port I/O operations between <code><aclass="el"href="group__system.html#ga9f6573c0763d1e4e97c63c62edad6e42"title="Enters the kernel lock mode.">chSysLock()</a></code> and <code><aclass="el"href="group__system.html#ga5a257fa58a09815eb64a45e2dfbdc22e"title="Leaves the kernel lock mode.">chSysUnlock()</a></code>. </dd>
<dd>
The function internally uses the <code><aclass="el"href="group___p_a_l.html#gad286cfdb9f088a7c8e5085d19ac728d3"title="Reads a group of bits.">palReadGroup()</a></code> macro. The use of this function is preferred when you value code size, readability and error checking over speed.</dd></dl>
<dl><dt><b>Parameters:</b></dt><dd>
<tableborder="0"cellspacing="2"cellpadding="0">
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>bus</em> </td><td>the I/O bus, pointer to a <code><aclass="el"href="struct_i_o_bus.html"title="I/O bus descriptor.">IOBus</a></code> structure </td></tr>
</table>
</dd>
</dl>
<dlclass="return"><dt><b>Returns:</b></dt><dd>The bus logical states. </dd></dl>
<p>Definition at line <aclass="el"href="pal_8c_source.html#l00069">69</a> of file <aclass="el"href="pal_8c_source.html">pal.c</a>.</p>
<p>References <aclass="el"href="struct_i_o_bus.html#ab2efb4f2a7504ac2e737de26c1e4f33a">IOBus::bus_mask</a>, <aclass="el"href="struct_i_o_bus.html#a50c155a7f9aa5b254faa372f0619286a">IOBus::bus_offset</a>, <aclass="el"href="struct_i_o_bus.html#a79c1372324fc1d9d2c571ac6d47163f9">IOBus::bus_portid</a>, <aclass="el"href="group__debug.html#ga6bb6c0f97caab3a66332c8bfbf7a3844">chDbgCheck</a>, <aclass="el"href="group___p_a_l___l_l_d.html#ga20ffc1985d583352e179f5f2c3fa700e">PAL_IOPORTS_WIDTH</a>, and <aclass="el"href="group___p_a_l.html#gad286cfdb9f088a7c8e5085d19ac728d3">palReadGroup</a>.</p>
<dlclass="note"><dt><b>Note:</b></dt><dd>The operation is not guaranteed to be atomic on all the architectures, for atomicity and/or portability reasons you may need to enclose port I/O operations between <code><aclass="el"href="group__system.html#ga9f6573c0763d1e4e97c63c62edad6e42"title="Enters the kernel lock mode.">chSysLock()</a></code> and <code><aclass="el"href="group__system.html#ga5a257fa58a09815eb64a45e2dfbdc22e"title="Leaves the kernel lock mode.">chSysUnlock()</a></code>. </dd>
<dd>
The default implementation is non atomic and not necessarily optimal. Low level drivers may optimize the function by using specific hardware or coding.</dd></dl>
<dl><dt><b>Parameters:</b></dt><dd>
<tableborder="0"cellspacing="2"cellpadding="0">
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>bus</em> </td><td>the I/O bus, pointer to a <code><aclass="el"href="struct_i_o_bus.html"title="I/O bus descriptor.">IOBus</a></code> structure </td></tr>
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>bits</em> </td><td>the bits to be written on the I/O bus. Values exceeding the bus width are masked so most significant bits are lost. </td></tr>
</table>
</dd>
</dl>
<p>Definition at line <aclass="el"href="pal_8c_source.html#l00092">92</a> of file <aclass="el"href="pal_8c_source.html">pal.c</a>.</p>
<p>References <aclass="el"href="struct_i_o_bus.html#ab2efb4f2a7504ac2e737de26c1e4f33a">IOBus::bus_mask</a>, <aclass="el"href="struct_i_o_bus.html#a50c155a7f9aa5b254faa372f0619286a">IOBus::bus_offset</a>, <aclass="el"href="struct_i_o_bus.html#a79c1372324fc1d9d2c571ac6d47163f9">IOBus::bus_portid</a>, <aclass="el"href="group__debug.html#ga6bb6c0f97caab3a66332c8bfbf7a3844">chDbgCheck</a>, <aclass="el"href="group___p_a_l___l_l_d.html#ga20ffc1985d583352e179f5f2c3fa700e">PAL_IOPORTS_WIDTH</a>, and <aclass="el"href="group___p_a_l.html#gacb25ee0b16d9fb701e3fd21e5dbb990a">palWriteGroup</a>.</p>
<dlclass="note"><dt><b>Note:</b></dt><dd>The operation is not guaranteed to be atomic on all the architectures, for atomicity and/or portability reasons you may need to enclose port I/O operations between <code><aclass="el"href="group__system.html#ga9f6573c0763d1e4e97c63c62edad6e42"title="Enters the kernel lock mode.">chSysLock()</a></code> and <code><aclass="el"href="group__system.html#ga5a257fa58a09815eb64a45e2dfbdc22e"title="Leaves the kernel lock mode.">chSysUnlock()</a></code>. </dd>
<dd>
The default implementation is non atomic and not necessarily optimal. Low level drivers may optimize the function by using specific hardware or coding.</dd></dl>
<dl><dt><b>Parameters:</b></dt><dd>
<tableborder="0"cellspacing="2"cellpadding="0">
<tr><tdvalign="top"><tt>[in]</tt> </td><tdvalign="top"><em>bus</em> </td><td>the I/O bus, pointer to a <code><aclass="el"href="struct_i_o_bus.html"title="I/O bus descriptor.">IOBus</a></code> structure </td></tr>
Generated on Sun Oct 24 2010 09:40:46 for ChibiOS/RT by <ahref="http://www.doxygen.org/index.html"><imgsrc="doxygen.png"alt="doxygen"align="middle"border="0"></a> 1.7.1</small></address>
