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<h1>at91sam7_mii.h File Reference</h1>
<p>AT91SAM7 low level MII driver header.
<a href="#_details">More...</a></p>
<p><a href="at91sam7__mii_8h_source.html">Go to the source code of this file.</a></p>
<table border="0" cellpadding="0" cellspacing="0">
<tr><td colspan="2"><h2>Defines</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___a_t91_s_a_m7___m_i_i.html#gab24379779b5f0520fc9a4d0537b70705">PHY_HARDWARE</a>&nbsp;&nbsp;&nbsp;PHY_MICREL_KS8721</td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">PHY manufacturer and model. <a href="group___a_t91_s_a_m7___m_i_i.html#gab24379779b5f0520fc9a4d0537b70705"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___a_t91_s_a_m7___m_i_i.html#ga6d90b77a939f982c12f749bb1158b9b6">PHY_ADDRESS</a>&nbsp;&nbsp;&nbsp;1</td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Pins latched by the PHY at reset. <a href="group___a_t91_s_a_m7___m_i_i.html#ga6d90b77a939f982c12f749bb1158b9b6"></a><br/></td></tr>
<tr><td colspan="2"><h2>Typedefs</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">typedef <a class="el" href="group___s_t_m8___c_o_r_e.html#ga1f1825b69244eb3ad2c7165ddc99c956">uint16_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___a_t91_s_a_m7___m_i_i.html#ga7330701450a8c3c2f607a7586e6df3cd">phyreg_t</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Type of a PHY register value. <a href="group___a_t91_s_a_m7___m_i_i.html#ga7330701450a8c3c2f607a7586e6df3cd"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">typedef <a class="el" href="group___s_t_m8___c_o_r_e.html#gaba7bc1797add20fe3efdf37ced1182c5">uint8_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___a_t91_s_a_m7___m_i_i.html#gab8b750d6ae286c086922eb418aab4716">phyaddr_t</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Type of a PHY register address. <a href="group___a_t91_s_a_m7___m_i_i.html#gab8b750d6ae286c086922eb418aab4716"></a><br/></td></tr>
<tr><td colspan="2"><h2>Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___a_t91_s_a_m7___m_i_i.html#gaed3a80e66768844a59770c6e6d1e3f2c">miiInit</a> (void)</td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Low level MII driver initialization. <a href="group___a_t91_s_a_m7___m_i_i.html#gaed3a80e66768844a59770c6e6d1e3f2c"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___a_t91_s_a_m7___m_i_i.html#ga221391bf04e9bca34eb94daee7dcbd74">miiReset</a> (<a class="el" href="struct_m_a_c_driver.html">MACDriver</a> *macp)</td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Resets a PHY device. <a href="group___a_t91_s_a_m7___m_i_i.html#ga221391bf04e9bca34eb94daee7dcbd74"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="group___a_t91_s_a_m7___m_i_i.html#ga7330701450a8c3c2f607a7586e6df3cd">phyreg_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___a_t91_s_a_m7___m_i_i.html#gaf7d0058596e16908cb99eac98e74bc41">miiGet</a> (<a class="el" href="struct_m_a_c_driver.html">MACDriver</a> *macp, <a class="el" href="group___a_t91_s_a_m7___m_i_i.html#gab8b750d6ae286c086922eb418aab4716">phyaddr_t</a> addr)</td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Reads a PHY register through the MII interface. <a href="group___a_t91_s_a_m7___m_i_i.html#gaf7d0058596e16908cb99eac98e74bc41"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___a_t91_s_a_m7___m_i_i.html#gac204449da72cfdd418d590afeabf9e1a">miiPut</a> (<a class="el" href="struct_m_a_c_driver.html">MACDriver</a> *macp, <a class="el" href="group___a_t91_s_a_m7___m_i_i.html#gab8b750d6ae286c086922eb418aab4716">phyaddr_t</a> addr, <a class="el" href="group___a_t91_s_a_m7___m_i_i.html#ga7330701450a8c3c2f607a7586e6df3cd">phyreg_t</a> value)</td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Writes a PHY register through the MII interface. <a href="group___a_t91_s_a_m7___m_i_i.html#gac204449da72cfdd418d590afeabf9e1a"></a><br/></td></tr>
</table>
<hr/><a name="_details"></a><h2>Detailed Description</h2>
<p>AT91SAM7 low level MII driver header. </p>
<p>Definition in file <a class="el" href="at91sam7__mii_8h_source.html">at91sam7_mii.h</a>.</p>
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