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https://salsa.debian.org/gnuk-team/gnuk/gnuk.git
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259 lines
8.6 KiB
C
259 lines
8.6 KiB
C
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/******************** (C) COPYRIGHT 2010 STMicroelectronics ********************
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* File Name : otgd_fs_cal.h
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* Author : STMicroelectronics
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* Version : V3.1.1
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* Date : 04/07/2010
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* Description : Header of OTG FS Device Core Access Layer interface.
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********************************************************************************
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* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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#ifndef __OTG_CORE_H__
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#define __OTG_CORE_H__
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#ifdef STM32F10X_CL
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#include "stm32f10x.h"
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#include "usb_type.h"
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#if defined ( __CC_ARM )
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#define __packed __packed /*!< packing keyword for ARM Compiler */
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#elif defined ( __ICCARM__ )
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#define __packed __packed /*!< packing keyword for IAR Compiler */
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#elif defined ( __GNUC__ )
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#define __packed __attribute__ ((__packed__)) /*!< packing keyword for GNU Compiler */
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#elif defined ( __TASKING__ ) /*!< packing keyword for TASKING Compiler */
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#define __packed
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#endif /* __CC_ARM */
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/*******************************************************************************
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define and types
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*******************************************************************************/
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#define DEVICE_MODE_ENABLED
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#ifndef NULL
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#define NULL ((void *)0)
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#endif
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#define DEV_EP_TX_DIS 0x0000
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#define DEV_EP_TX_STALL 0x0010
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#define DEV_EP_TX_NAK 0x0020
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#define DEV_EP_TX_VALID 0x0030
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#define DEV_EP_RX_DIS 0x0000
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#define DEV_EP_RX_STALL 0x1000
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#define DEV_EP_RX_NAK 0x2000
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#define DEV_EP_RX_VALID 0x3000
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/***************** GLOBAL DEFINES ***************************/
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#define GAHBCFG_TXFEMPTYLVL_EMPTY 1
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#define GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0
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#define GAHBCFG_GLBINT_ENABLE 1
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#define GAHBCFG_INT_DMA_BURST_SINGLE 0
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#define GAHBCFG_INT_DMA_BURST_INCR 1
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#define GAHBCFG_INT_DMA_BURST_INCR4 3
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#define GAHBCFG_INT_DMA_BURST_INCR8 5
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#define GAHBCFG_INT_DMA_BURST_INCR16 7
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#define GAHBCFG_DMAENABLE 1
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#define GAHBCFG_TXFEMPTYLVL_EMPTY 1
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#define GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0
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#define GRXSTS_PKTSTS_IN 2
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#define GRXSTS_PKTSTS_IN_XFER_COMP 3
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#define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5
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#define GRXSTS_PKTSTS_CH_HALTED 7
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#define DEVICE_MODE 0
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#define HOST_MODE 1
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/***************** DEVICE DEFINES ***************************/
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#define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ 0
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#define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ 1
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#define DSTS_ENUMSPD_LS_PHY_6MHZ 2
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#define DSTS_ENUMSPD_FS_PHY_48MHZ 3
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#define DCFG_FRAME_INTERVAL_80 0
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#define DCFG_FRAME_INTERVAL_85 1
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#define DCFG_FRAME_INTERVAL_90 2
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#define DCFG_FRAME_INTERVAL_95 3
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#define DEP0CTL_MPS_64 0
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#define DEP0CTL_MPS_32 1
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#define DEP0CTL_MPS_16 2
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#define DEP0CTL_MPS_8 3
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#define EP_SPEED_LOW 0
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#define EP_SPEED_FULL 1
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#define EP_SPEED_HIGH 2
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#define EP_TYPE_CTRL 0
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#define EP_TYPE_ISOC 1
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#define EP_TYPE_BULK 2
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#define EP_TYPE_INTR 3
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#define STS_GOUT_NAK 1
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#define STS_DATA_UPDT 2
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#define STS_XFER_COMP 3
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#define STS_SETUP_COMP 4
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#define STS_SETUP_UPDT 6
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typedef enum {
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USB_OTG_OK,
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USB_OTG_FAIL
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}USB_OTG_Status;
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typedef struct USB_OTG_hc
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{
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uint8_t hc_num;
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uint8_t dev_addr ;
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uint8_t ep_num;
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uint8_t ep_is_in;
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uint8_t speed;
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uint8_t ep_type;
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uint16_t max_packet;
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uint8_t data_pid;
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uint16_t multi_count;
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uint8_t *xfer_buff;
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uint32_t xfer_len;
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}
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USB_OTG_HC , *PUSB_OTG_HC;
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typedef struct USB_OTG_ep
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{
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uint8_t num;
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uint8_t is_in;
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uint32_t tx_fifo_num;
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uint32_t type;
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uint8_t data_pid_start;
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uint8_t even_odd_frame;
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uint32_t maxpacket;
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uint8_t *xfer_buff;
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uint32_t xfer_len;
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uint32_t xfer_count;
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}
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USB_OTG_EP , *PUSB_OTG_EP;
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/********************************************************************************
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MACRO'S
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********************************************************************************/
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#define CLEAR_IN_EP_INTR(epnum,intr) \
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diepint.d32=0; \
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diepint.b.intr = 1; \
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WRITE_REG32(&core_regs.inep_regs[epnum]->dev_in_ep_int,diepint.d32);
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#define CLEAR_OUT_EP_INTR(epnum,intr) \
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doepint.d32=0; \
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doepint.b.intr = 1; \
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WRITE_REG32(&core_regs.outep_regs[epnum]->dev_out_ep_int,doepint.d32);
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#define READ_REG32(reg) (*(__IO uint32_t *)reg)
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#define WRITE_REG32(reg,value) (*(__IO uint32_t *)reg = value)
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#define MODIFY_REG32(reg,clear_mask,set_mask) \
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WRITE_REG32(reg, (((READ_REG32(reg)) & ~clear_mask) | set_mask ) )
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#define uDELAY(usec) udelay(usec)
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#define mDELAY(msec) uDELAY(msec * 1000)
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#define _OTGD_FS_GATE_PHYCLK *(__IO uint32_t*)(0x50000E00) = 0x03
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#define _OTGD_FS_UNGATE_PHYCLK *(__IO uint32_t*)(0x50000E00) = 0x00
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/*******************************************************************************
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this can be changed for real time base
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*******************************************************************************/
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static void udelay (const uint32_t usec)
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{
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uint32_t count = 0;
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const uint32_t utime = usec * 10;
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do
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{
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if ( ++count > utime )
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{
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return ;
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}
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}
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while (1);
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}
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/********************************************************************************
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EXPORTED FUNCTIONS FROM THE OTGD_FS_CAL LAYER
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********************************************************************************/
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USB_OTG_Status OTGD_FS_CoreInit(void);
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USB_OTG_Status OTGD_FS_SetAddress(uint32_t BaseAddress);
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USB_OTG_Status OTGD_FS_EnableGlobalInt(void);
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USB_OTG_Status OTGD_FS_DisableGlobalInt(void);
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USB_OTG_Status USB_OTG_CoreInitHost(void);
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USB_OTG_Status USB_OTG_EnableHostInt(void);
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USB_OTG_Status USB_OTG_DisableHostInt(void);
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void* OTGD_FS_ReadPacket(uint8_t *dest, uint16_t bytes);
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USB_OTG_Status OTGD_FS_WritePacket(uint8_t *src, uint8_t ch_ep_num, uint16_t bytes);
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USB_OTG_Status USB_OTG_HcInit(USB_OTG_HC *hc);
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USB_OTG_Status USB_OTG_StartXfer(USB_OTG_HC *hc);
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uint32_t USB_OTG_ResetPort( void);
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uint32_t USB_OTG_ReadHPRT0(void);
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uint32_t OTGD_FS_ReadDevAllInEPItr(void);
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uint32_t OTGD_FS_ReadCoreItr(void);
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uint32_t OTGD_FS_ReadOtgItr (void);
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uint32_t USB_OTG_ReadHostAllChannels_intr (void);
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uint8_t IsHostMode(void);
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uint8_t IsDeviceMode(void);
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USB_OTG_Status USB_OTG_HcInit(USB_OTG_HC *hc);
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USB_OTG_Status USB_OTG_HcHalt(uint8_t hc_num);
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USB_OTG_Status OTGD_FS_FlushTxFifo (uint32_t num);
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USB_OTG_Status OTGD_FS_FlushRxFifo (void);
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USB_OTG_Status OTGD_FS_SetHostMode (void);
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USB_OTG_Status OTGD_FS_PhyInit(void);
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USB_OTG_Status USB_OTG_HcStartXfer(USB_OTG_HC *hc);
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USB_OTG_Status OTGD_FS_CoreInitDev (void);
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USB_OTG_Status OTGD_FS_EnableDevInt(void);
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USB_OTG_Status OTGD_FS_EP0Activate(void);
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USB_OTG_Status OTGD_FS_EPActivate(USB_OTG_EP *ep);
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USB_OTG_Status OTGD_FS_EPDeactivate(USB_OTG_EP *ep);
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USB_OTG_Status OTGD_FS_EPStartXfer(USB_OTG_EP *ep);
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USB_OTG_Status OTGD_FS_EP0StartXfer(USB_OTG_EP *ep);
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USB_OTG_Status OTGD_FS_EPSetStall(USB_OTG_EP *ep);
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USB_OTG_Status OTGD_FS_EPClearStall(USB_OTG_EP *ep);
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uint32_t OTGD_FS_ReadDevAllOutEp_itr(void);
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uint32_t OTGD_FS_ReadDevOutEP_itr(USB_OTG_EP *ep);
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uint32_t OTGD_FS_ReadDevAllInEPItr(void);
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uint32_t OTGD_FS_Dev_GetEPStatus(USB_OTG_EP *ep);
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void OTGD_FS_Dev_SetEPStatus(USB_OTG_EP *ep, uint32_t Status);
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void OTGD_FS_Dev_SetRemoteWakeup(void);
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void OTGD_FS_Dev_ResetRemoteWakeup(void);
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#endif /* STM32F10X_CL */
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#endif
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/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
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