diff --git a/ChangeLog b/ChangeLog index 646d884..d4caf2e 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,5 +1,8 @@ 2011-07-04 NIIBE Yutaka + * ChibiOS_2.0.8/os/ports/GCC/ARMCMx/chcore_v7m.c + (_port_irq_epilogue, _port_switch_from_isr): Apply a patch of 2.2.6. + * ChibiOS_2.0.8/os/hal/platforms/STM32/adc_lld.h: Apply a patch of ADC from the branch of ChibiOS_2.0.X. diff --git a/ChibiOS_2.0.8/os/ports/GCC/ARMCMx/chcore_v7m.c b/ChibiOS_2.0.8/os/ports/GCC/ARMCMx/chcore_v7m.c index e893773..6d5b35e 100644 --- a/ChibiOS_2.0.8/os/ports/GCC/ARMCMx/chcore_v7m.c +++ b/ChibiOS_2.0.8/os/ports/GCC/ARMCMx/chcore_v7m.c @@ -107,12 +107,12 @@ void SVCallVector(void) { } /** - * @brief Reschedule verification and setup after an IRQ. + * @brief Exception exit redirection to _port_switch_from_isr(). */ void _port_irq_epilogue(void) { port_lock_from_isr(); - if ((SCB_ICSR & ICSR_RETTOBASE) && chSchIsRescRequiredExI()) { + if ((SCB_ICSR & ICSR_RETTOBASE)) { register struct extctx *ctxp; /* Adding an artificial exception return context, there is no need to @@ -126,7 +126,6 @@ void _port_irq_epilogue(void) { order to keep the rest of the context switching atomic.*/ return; } - /* ISR exit without context switching.*/ port_unlock_from_isr(); } @@ -139,7 +138,8 @@ __attribute__((naked)) #endif void _port_switch_from_isr(void) { - chSchDoRescheduleI(); + if (chSchIsRescRequiredExI()) + chSchDoRescheduleI(); asm volatile ("svc #0"); }