This commit is contained in:
NIIBE Yutaka 2012-05-24 21:59:11 +09:00
parent 1c910fc3e2
commit 37f82b6026
2 changed files with 34 additions and 34 deletions

View File

@ -271,12 +271,35 @@ enum flash_status
FLASH_TIMEOUT FLASH_TIMEOUT
}; };
#define FLASH_SR_BSY 0x01
#define FLASH_SR_PGERR 0x04
#define FLASH_SR_WRPRTERR 0x10
#define FLASH_SR_EOP 0x20
#define FLASH_CR_PG 0x0001
#define FLASH_CR_PER 0x0002
#define FLASH_CR_MER 0x0004
#define FLASH_CR_OPTPG 0x0010
#define FLASH_CR_OPTER 0x0020
#define FLASH_CR_STRT 0x0040
#define FLASH_CR_LOCK 0x0080
#define FLASH_CR_OPTWRE 0x0200
#define FLASH_CR_ERRIE 0x0400
#define FLASH_CR_EOPIE 0x1000
#define FLASH_OBR_RDPRT 0x00000002
#define OPTION_BYTES_ADDR 0x1ffff800
static void __attribute__ ((used)) static void __attribute__ ((used))
flash_unlock (void) flash_unlock (void)
{
if ((FLASH->CR & FLASH_CR_LOCK) != 0)
{ {
FLASH->KEYR = FLASH_KEY1; FLASH->KEYR = FLASH_KEY1;
FLASH->KEYR = FLASH_KEY2; FLASH->KEYR = FLASH_KEY2;
} }
}
static void fatal (void) static void fatal (void)
{ {
@ -353,24 +376,6 @@ handler vector_table[] __attribute__ ((section(".vectors"))) = {
usb_interrupt_handler, usb_interrupt_handler,
}; };
#define FLASH_SR_BSY 0x01
#define FLASH_SR_PGERR 0x04
#define FLASH_SR_WRPRTERR 0x10
#define FLASH_SR_EOP 0x20
#define FLASH_CR_PG 0x0001
#define FLASH_CR_PER 0x0002
#define FLASH_CR_MER 0x0004
#define FLASH_CR_OPTPG 0x0010
#define FLASH_CR_OPTER 0x0020
#define FLASH_CR_STRT 0x0040
#define FLASH_CR_LOCK 0x0080
#define FLASH_CR_OPTWRE 0x0200
#define FLASH_CR_ERRIE 0x0400
#define FLASH_CR_EOPIE 0x1000
#define FLASH_OBR_RDPRT 0x00000002
static int static int
flash_get_status (void) flash_get_status (void)
{ {
@ -421,7 +426,6 @@ flash_program_halfword (uint32_t addr, uint16_t data)
*(volatile uint16_t *)addr = data; *(volatile uint16_t *)addr = data;
status = flash_wait_for_last_operation (FLASH_PROGRAM_TIMEOUT); status = flash_wait_for_last_operation (FLASH_PROGRAM_TIMEOUT);
if (status != FLASH_TIMEOUT)
FLASH->CR &= ~FLASH_CR_PG; FLASH->CR &= ~FLASH_CR_PG;
} }
intr_enable (); intr_enable ();
@ -441,7 +445,7 @@ flash_write (uint32_t dst_addr, const uint8_t *src, size_t len)
hw |= (*src++ << 8); hw |= (*src++ << 8);
status = flash_program_halfword (dst_addr, hw); status = flash_program_halfword (dst_addr, hw);
if (status != FLASH_COMPLETE) if (status != FLASH_COMPLETE)
return 0; return 0; /* error return */
dst_addr += 2; dst_addr += 2;
len -= 2; len -= 2;
@ -454,6 +458,7 @@ int
flash_protect (void) flash_protect (void)
{ {
int status; int status;
uint32_t option_bytes_value;
status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT); status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
@ -467,7 +472,6 @@ flash_protect (void)
FLASH->CR |= FLASH_CR_STRT; FLASH->CR |= FLASH_CR_STRT;
status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT); status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
if (status != FLASH_TIMEOUT)
FLASH->CR &= ~FLASH_CR_OPTER; FLASH->CR &= ~FLASH_CR_OPTER;
} }
intr_enable (); intr_enable ();
@ -475,10 +479,8 @@ flash_protect (void)
if (status != FLASH_COMPLETE) if (status != FLASH_COMPLETE)
return 0; return 0;
if ((FLASH->OBR & FLASH_OBR_RDPRT) != 0) option_bytes_value = *(uint32_t *)OPTION_BYTES_ADDR;
return 1; return (option_bytes_value & 0xff) == 0xff ? 1 : 0;
else
return 0;
} }
struct SCB struct SCB

View File

@ -381,20 +381,18 @@ flash_mass_erase_and_exec (void)
if ((FLASH->SR & FLASH_SR_BSY) == 0) if ((FLASH->SR & FLASH_SR_BSY) == 0)
{ {
uint32_t t = FLASH_MASS_ERASE_TIMEOUT;
FLASH->CR |= FLASH_CR_MER; FLASH->CR |= FLASH_CR_MER;
FLASH->CR |= FLASH_CR_STRT; FLASH->CR |= FLASH_CR_STRT;
while ((FLASH->SR & FLASH_SR_BSY) != 0 && t) while ((FLASH->SR & FLASH_SR_BSY) != 0)
--t; ;
FLASH->CR &= ~FLASH_CR_MER; FLASH->CR &= ~FLASH_CR_MER;
if ((FLASH->SR & (FLASH_SR_BSY|FLASH_SR_PGERR|FLASH_SR_WRPRTERR)) == 0) if ((FLASH->SR & (FLASH_SR_BSY|FLASH_SR_PGERR|FLASH_SR_WRPRTERR)) == 0)
(**func) (); (**func) ();
} }
palClearPad (IOPORT1, GPIOA_LED);
for (;;); for (;;);
} }