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more performance tweak
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09748fc046
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@ -1,3 +1,8 @@
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2011-05-31 NIIBE Yutaka <gniibe@fsij.org>
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* include/polarssl/bn_mul.h [__arm__]
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(MULADDC_HUIT, MULADDC_INIT, MULADDC_CORE, MULADDC_STOP): Tweak.
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2011-05-27 NIIBE Yutaka <gniibe@fsij.org>
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2011-05-27 NIIBE Yutaka <gniibe@fsij.org>
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* tool/gnuk_put_binary.py (main): Confirm Serial ID is written
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* tool/gnuk_put_binary.py (main): Confirm Serial ID is written
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@ -497,72 +497,68 @@
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#if defined(__arm__)
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#if defined(__arm__)
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#define MULADDC_HUIT \
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#define MULADDC_HUIT \
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asm( "ldmia r0!, { r4, r5 } " ); \
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"ldmia %0!, { r4, r5 } \n" \
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asm( "ldmia r1, { r8, r9 } " ); \
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"ldmia %1, { r8, r9 } \n" \
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asm( "umull r6, r7, r3, r4 " ); \
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"umull r6, r7, %2, r4 \n" \
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asm( "adcs r6, r6, r2 " ); \
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"adcs r6, r6, %3 \n" \
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asm( "adc r7, r7, #0 " ); \
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"adc r7, r7, #0 \n" \
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asm( "adds r8, r8, r6 " ); \
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"adds r8, r8, r6 \n" \
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asm( "umull r6, r2, r3, r5 " ); \
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"umull r6, %3, %2, r5 \n" \
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asm( "adcs r6, r6, r7 " ); \
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"adcs r6, r6, r7 \n" \
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asm( "adc r2, r2, #0 " ); \
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"adc %3, %3, #0 \n" \
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asm( "adds r9, r9, r6 " ); \
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"adds r9, r9, r6 \n" \
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asm( "stmia r1!, { r8, r9 } " ); \
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"stmia %1!, { r8, r9 } \n" \
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asm( "ldmia r0!, { r4, r5 } " ); \
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"ldmia %0!, { r4, r5 } \n" \
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asm( "ldmia r1, { r8, r9 } " ); \
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"ldmia %1, { r8, r9 } \n" \
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asm( "umull r6, r7, r3, r4 " ); \
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"umull r6, r7, %2, r4 \n" \
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asm( "adcs r6, r6, r2 " ); \
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"adcs r6, r6, %3 \n" \
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asm( "adc r7, r7, #0 " ); \
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"adc r7, r7, #0 \n" \
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asm( "adds r8, r8, r6 " ); \
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"adds r8, r8, r6 \n" \
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asm( "umull r6, r2, r3, r5 " ); \
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"umull r6, %3, %2, r5 \n" \
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asm( "adcs r6, r6, r7 " ); \
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"adcs r6, r6, r7 \n" \
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asm( "adc r2, r2, #0 " ); \
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"adc %3, %3, #0 \n" \
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asm( "adds r9, r9, r6 " ); \
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"adds r9, r9, r6 \n" \
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asm( "stmia r1!, { r8, r9 } " ); \
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"stmia %1!, { r8, r9 } \n" \
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asm( "ldmia r0!, { r4, r5 } " ); \
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"ldmia %0!, { r4, r5 } \n" \
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asm( "ldmia r1, { r8, r9 } " ); \
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"ldmia %1, { r8, r9 } \n" \
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asm( "umull r6, r7, r3, r4 " ); \
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"umull r6, r7, %2, r4 \n" \
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asm( "adcs r6, r6, r2 " ); \
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"adcs r6, r6, %3 \n" \
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asm( "adc r7, r7, #0 " ); \
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"adc r7, r7, #0 \n" \
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asm( "adds r8, r8, r6 " ); \
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"adds r8, r8, r6 \n" \
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asm( "umull r6, r2, r3, r5 " ); \
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"umull r6, %3, %2, r5 \n" \
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asm( "adcs r6, r6, r7 " ); \
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"adcs r6, r6, r7 \n" \
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asm( "adc r2, r2, #0 " ); \
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"adc %3, %3, #0 \n" \
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asm( "adds r9, r9, r6 " ); \
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"adds r9, r9, r6 \n" \
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asm( "stmia r1!, { r8, r9 } " ); \
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"stmia %1!, { r8, r9 } \n" \
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asm( "ldmia r0!, { r4, r5 } " ); \
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"ldmia %0!, { r4, r5 } \n" \
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asm( "ldmia r1, { r8, r9 } " ); \
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"ldmia %1, { r8, r9 } \n" \
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asm( "umull r6, r7, r3, r4 " ); \
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"umull r6, r7, %2, r4 \n" \
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asm( "adcs r6, r6, r2 " ); \
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"adcs r6, r6, %3 \n" \
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asm( "adc r7, r7, #0 " ); \
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"adc r7, r7, #0 \n" \
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asm( "adds r8, r8, r6 " ); \
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"adds r8, r8, r6 \n" \
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asm( "umull r6, r2, r3, r5 " ); \
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"umull r6, %3, %2, r5 \n" \
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asm( "adcs r6, r6, r7 " ); \
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"adcs r6, r6, r7 \n" \
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asm( "adc r2, r2, #0 " ); \
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"adc %3, %3, #0 \n" \
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asm( "adds r9, r9, r6 " ); \
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"adds r9, r9, r6 \n" \
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asm( "stmia r1!, { r8, r9 } " );
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"stmia %1!, { r8, r9 } \n"
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#define MULADDC_INIT \
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#define MULADDC_INIT \
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asm( "ldr r0, %0 " :: "m" (s)); \
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asm( "adds %0, #0 \n"
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asm( "ldr r1, %0 " :: "m" (d)); \
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asm( "ldr r2, %0 " :: "m" (c)); \
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asm( "ldr r3, %0 " :: "m" (b)); \
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asm( "adds r0, #0 ");
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#define MULADDC_CORE \
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#define MULADDC_CORE \
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asm( "ldr r5, [r1] " ); \
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"ldr r5, [%1] \n" \
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asm( "ldr r4, [r0], #4 " ); \
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"ldr r4, [%0], #4 \n" \
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asm( "adcs r5, r2, r5 " ); \
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"umull r6, r7, %2, r4 \n" \
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asm( "mov r2, #0 " ); \
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"adcs r6, r6, %3 \n" \
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asm( "umlal r5, r2, r3, r4 " ); \
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"adc %3, r7, #0 \n" \
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asm( "str r5, [r1], #4 " );
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"adds r5, r5, r6 \n" \
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"str r5, [%1], #4 \n"
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#define MULADDC_STOP \
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#define MULADDC_STOP \
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asm( "adc r2, r2, #0 " ); \
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"adc %3, %3, #0 " \
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asm( "str r2, %0 " : "=m" (c)); \
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: "=r" (s), "=r" (d), "=r" (b), "=r" (c) \
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asm( "str r1, %0 " : "=m" (d)); \
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: "0" (s), "1" (d), "2" (b), "3" (c) \
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asm( "str r0, %0 " : "=m" (s) :: \
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: "r4", "r5", "r6", "r7", "r8", "r9", "memory", "cc" );
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9");
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#endif /* ARMv3 */
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#endif /* ARMv3 */
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