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CPU_WITH_NO_GPIOE: New define.

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NIIBE Yutaka 2010-11-26 16:24:36 +09:00
parent 26ba4e2766
commit d369d176cb
5 changed files with 9 additions and 3 deletions
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5
ChangeLog
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@ -1,5 +1,10 @@
2010-11-26 NIIBE Yutaka <gniibe@fsij.org> 2010-11-26 NIIBE Yutaka <gniibe@fsij.org>
* boards/STBEE_MINI/board.h (CPU_WITH_NO_GPIOE): New define.
* ChibiOS_2.0.6/os/hal/platforms/STM32/hal_lld.c: Use it.
* ChibiOS_2.0.6/os/hal/platforms/STM32/pal_lld.c: Likewise.
* ChibiOS_2.0.6/os/hal/platforms/STM32/pal_lld.h: Likewise.
* src/openpgp.c (cmd_pso): DigestInfo by SHA224/SHA384/SHA512 is supported. * src/openpgp.c (cmd_pso): DigestInfo by SHA224/SHA384/SHA512 is supported.
2010-11-22 NIIBE Yutaka <gniibe@fsij.org> 2010-11-22 NIIBE Yutaka <gniibe@fsij.org>

2
ChibiOS_2.0.6/os/hal/platforms/STM32/hal_lld.c
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@ -55,7 +55,7 @@ const PALConfig pal_default_config =
{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH}, {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH}, {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH}, {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
#if !defined(STM32F10X_LD) && !defined(BOARD_STBEE_MINI) #if !defined(STM32F10X_LD) && !defined(CPU_WITH_NO_GPIOE)
{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH}, {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
#endif #endif
#if defined(STM32F10X_HD) #if defined(STM32F10X_HD)

2
ChibiOS_2.0.6/os/hal/platforms/STM32/pal_lld.c
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@ -114,7 +114,7 @@ void _pal_lld_init(const PALConfig *config) {
IOPORT4->ODR = config->PDData.odr; IOPORT4->ODR = config->PDData.odr;
IOPORT4->CRH = config->PDData.crh; IOPORT4->CRH = config->PDData.crh;
IOPORT4->CRL = config->PDData.crl; IOPORT4->CRL = config->PDData.crl;
#if !(defined(STM32F10X_LD) || defined(BOARD_STBEE_MINI)) || defined(__DOXYGEN__) #if !(defined(STM32F10X_LD) || defined(CPU_WITH_NO_GPIOE)) || defined(__DOXYGEN__)
IOPORT5->ODR = config->PEData.odr; IOPORT5->ODR = config->PEData.odr;
IOPORT5->CRH = config->PEData.crh; IOPORT5->CRH = config->PEData.crh;
IOPORT5->CRL = config->PEData.crl; IOPORT5->CRL = config->PEData.crl;

2
ChibiOS_2.0.6/os/hal/platforms/STM32/pal_lld.h
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@ -83,7 +83,7 @@ typedef struct {
stm32_gpio_setup_t PCData; stm32_gpio_setup_t PCData;
/** @brief Port D setup data.*/ /** @brief Port D setup data.*/
stm32_gpio_setup_t PDData; stm32_gpio_setup_t PDData;
#if !(defined(STM32F10X_LD) || defined(BOARD_STBEE_MINI)) || defined(__DOXYGEN__) #if !(defined(STM32F10X_LD) || defined(CPU_WITH_NO_GPIOE)) || defined(__DOXYGEN__)
/** @brief Port E setup data.*/ /** @brief Port E setup data.*/
stm32_gpio_setup_t PEData; stm32_gpio_setup_t PEData;
#endif #endif

1
boards/STBEE_MINI/board.h
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@ -36,6 +36,7 @@
*/ */
#define BOARD_STBEE_MINI #define BOARD_STBEE_MINI
#define BOARD_NAME "STBee Mini" #define BOARD_NAME "STBee Mini"
#define CPU_WITH_NO_GPIOE 1
/* /*
* Board frequencies. * Board frequencies.