ChibiOS/RT Architecture - Reference Manual - Guides |
00001 /* 00002 ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. 00003 00004 This file is part of ChibiOS/RT. 00005 00006 ChibiOS/RT is free software; you can redistribute it and/or modify 00007 it under the terms of the GNU General Public License as published by 00008 the Free Software Foundation; either version 3 of the License, or 00009 (at your option) any later version. 00010 00011 ChibiOS/RT is distributed in the hope that it will be useful, 00012 but WITHOUT ANY WARRANTY; without even the implied warranty of 00013 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00014 GNU General Public License for more details. 00015 00016 You should have received a copy of the GNU General Public License 00017 along with this program. If not, see <http://www.gnu.org/licenses/>. 00018 00019 --- 00020 00021 A special exception to the GPL can be applied should you wish to distribute 00022 a combined work that includes ChibiOS/RT, without being obliged to provide 00023 the source code for any proprietary components. See the file exception.txt 00024 for full details of how and when the exception can be applied. 00025 */ 00026 00027 /** 00028 * @file AT91SAM7/at91sam7_mii.c 00029 * @brief AT91SAM7 low level MII driver code. 00030 * @addtogroup AT91SAM7_MII 00031 * @{ 00032 */ 00033 00034 #include "ch.h" 00035 #include "hal.h" 00036 #include "at91sam7_mii.h" 00037 00038 #if CH_HAL_USE_MAC || defined(__DOXYGEN__) 00039 00040 /*===========================================================================*/ 00041 /* Driver exported variables. */ 00042 /*===========================================================================*/ 00043 00044 /*===========================================================================*/ 00045 /* Driver local variables. */ 00046 /*===========================================================================*/ 00047 00048 /*===========================================================================*/ 00049 /* Driver local functions. */ 00050 /*===========================================================================*/ 00051 00052 /*===========================================================================*/ 00053 /* Driver interrupt handlers. */ 00054 /*===========================================================================*/ 00055 00056 /*===========================================================================*/ 00057 /* Driver exported functions. */ 00058 /*===========================================================================*/ 00059 00060 /** 00061 * @brief Low level MII driver initialization. 00062 */ 00063 void miiInit(void) { 00064 00065 } 00066 00067 /** 00068 * @brief Resets a PHY device. 00069 * 00070 * @param[in] macp pointer to the @p MACDriver object 00071 */ 00072 void miiReset(MACDriver *macp) { 00073 00074 (void)macp; 00075 00076 /* 00077 * Disables the pullups on all the pins that are latched on reset by the PHY. 00078 */ 00079 AT91C_BASE_PIOB->PIO_PPUDR = PHY_LATCHED_PINS; 00080 00081 #ifdef PIOB_PHY_PD_MASK 00082 /* 00083 * PHY power control. 00084 */ 00085 AT91C_BASE_PIOB->PIO_OER = PIOB_PHY_PD_MASK; // Becomes an output. 00086 AT91C_BASE_PIOB->PIO_PPUDR = PIOB_PHY_PD_MASK; // Default pullup disabled. 00087 #if (PHY_HARDWARE == PHY_DAVICOM_9161) 00088 AT91C_BASE_PIOB->PIO_CODR = PIOB_PHY_PD_MASK; // Output to low level. 00089 #else 00090 AT91C_BASE_PIOB->PIO_SODR = PIOB_PHY_PD_MASK; // Output to high level. 00091 #endif 00092 #endif // PIOB_PHY_PD_MASK 00093 00094 /* 00095 * PHY reset by pulsing the NRST pin. 00096 */ 00097 AT91C_BASE_RSTC->RSTC_RMR = 0xA5000100; 00098 AT91C_BASE_RSTC->RSTC_RCR = 0xA5000000 | AT91C_RSTC_EXTRST; 00099 while (!(AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_NRSTL)) 00100 ; 00101 } 00102 00103 /** 00104 * @brief Reads a PHY register through the MII interface. 00105 * 00106 * @param[in] macp pointer to the @p MACDriver object 00107 * @param addr the register address 00108 * @return The register value. 00109 */ 00110 phyreg_t miiGet(MACDriver *macp, phyaddr_t addr) { 00111 00112 (void)macp; 00113 AT91C_BASE_EMAC->EMAC_MAN = (0b01 << 30) | /* SOF */ 00114 (0b10 << 28) | /* RW */ 00115 (PHY_ADDRESS << 23) | /* PHYA */ 00116 (addr << 18) | /* REGA */ 00117 (0b10 << 16); /* CODE */ 00118 while (!( AT91C_BASE_EMAC->EMAC_NSR & AT91C_EMAC_IDLE)) 00119 ; 00120 return (phyreg_t)(AT91C_BASE_EMAC->EMAC_MAN & 0xFFFF); 00121 } 00122 00123 /** 00124 * @brief Writes a PHY register through the MII interface. 00125 * 00126 * @param[in] macp pointer to the @p MACDriver object 00127 * @param addr the register address 00128 * @param value the new register value 00129 */ 00130 void miiPut(MACDriver *macp, phyaddr_t addr, phyreg_t value) { 00131 00132 (void)macp; 00133 AT91C_BASE_EMAC->EMAC_MAN = (0b01 << 30) | /* SOF */ 00134 (0b01 << 28) | /* RW */ 00135 (PHY_ADDRESS << 23) | /* PHYA */ 00136 (addr << 18) | /* REGA */ 00137 (0b10 << 16) | /* CODE */ 00138 value; 00139 while (!( AT91C_BASE_EMAC->EMAC_NSR & AT91C_EMAC_IDLE)) 00140 ; 00141 } 00142 00143 #endif /* CH_HAL_USE_MAC */ 00144 00145 /** @} */