MegaAVR
[Ports]

Collaboration diagram for MegaAVR:

Description

AVR port details. This section how the ChibiOS/RT features are implemented on this architecture.

The ChibiOS/RT logical System States are mapped as follow in the AVR port:

Init. This state is represented by the startup code and the initialization code before chSysInit() is executed. It has not a special hardware state associated.
Normal. This is the state the system has after executing chSysInit(). Interrupts are enabled.
Suspended. Interrupts are disabled.
Disabled. Interrupts are enabled. This state is equivalent to the Suspended state because there are no fast interrupts in this architecture.
Sleep. This state is entered with the execution of the specific instruction sleep.
S-Locked. Interrupts are disabled.
I-Locked. This state is equivalent to the SRI state, the chSysLockI() and chSysUnlockI() APIs do nothing (still use them in order to formally change state because this may change).
Serving Regular Interrupt. Normal interrupt service code.
Serving Fast Interrupt. Not present in this architecture.
Serving Non-Maskable Interrupt. Not present in this architecture.
Halted. Implemented as an infinite loop with interrupts disabled.

The AVR does not have a dedicated interrupt stack, make sure to reserve enough stack space for interrupts in each thread stack. This can be done by modifying the INT_REQUIRED_STACK macro into ./ports/AVR/chcore.h.

Modules
	Configuration Options
	AVR Configuration Options.
	AVR Core Implementation
	AVR specific port code, structures and macros.
	AVR Drivers
	Device drivers included in the AVR support.