ChibiOS/RT Architecture - Reference Manual - Guides |
Cortex-Mx NVIC support macros and structures. More...
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Data Structures | |
struct | CM3_ST |
Structure representing the SYSTICK I/O space. More... | |
struct | CM3_NVIC |
Structure representing the NVIC I/O space. More... | |
struct | CM3_SCB |
Structure representing the System Control Block I/O space. More... | |
Defines | |
#define | HANDLER_MEM_MANAGE 0 |
#define | HANDLER_BUS_FAULT 1 |
#define | HANDLER_USAGE_FAULT 2 |
#define | HANDLER_SVCALL 7 |
#define | HANDLER_DEBUG_MONITOR 8 |
#define | HANDLER_PENDSV 10 |
#define | HANDLER_SYSTICK 11 |
#define | NVIC_ITCR (*((IOREG32 *)0xE000E004)) |
NVIC ITCR register. | |
#define | NVIC_STIR (*((IOREG32 *)0xE000EF00)) |
NVIC STIR register. | |
#define | STBase ((CM3_ST *)0xE000E010) |
SYSTICK peripheral base address. | |
#define | NVICBase ((CM3_NVIC *)0xE000E100) |
NVIC peripheral base address. | |
#define | SCBBase ((CM3_SCB *)0xE000ED00) |
SCB peripheral base address. | |
Typedefs | |
typedef volatile uint8_t | IOREG8 |
typedef volatile uint32_t | IOREG32 |
Functions | |
void | NVICEnableVector (uint32_t n, uint32_t prio) |
Sets the priority of an interrupt handler and enables it. | |
void | NVICDisableVector (uint32_t n) |
Disables an interrupt handler. | |
void | NVICSetSystemHandlerPriority (uint32_t handler, uint32_t prio) |
Changes the priority of a system handler. |
Cortex-Mx NVIC support macros and structures.
Definition in file nvic.h.