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<td><big><big>ChibiOS/RT</big></big><br><br>Architecture - Reference Manual - Guides</td>
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<h1>PowerPC<br/>
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[<a class="el" href="group__ports.html">Ports</a>]</small>
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Collaboration diagram for PowerPC:</div>
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<hr/><a name="_details"></a><h2>Description</h2>
<p>PowerPC port details. This section describes how the ChibiOS/RT features are implemented on this architecture.</p>
<h2><a class="anchor" id="PPC_STATES"></a>
Mapping of the System States in the PowerPC port</h2>
<p>The ChibiOS/RT logical <a class="el" href="concepts.html#system_states">System States</a> are mapped as follow in the PowerPC port:</p>
<ul>
<li><b>Init</b>. This state is represented by the startup code and the initialization code before <code><a class="el" href="group__system.html#gafe2c7de6567e98e487e009e81e3be10b" title="ChibiOS/RT initialization.">chSysInit()</a></code> is executed. It has not a special hardware state associated.</li>
<li><b>Normal</b>. This is the state the system has after executing <code><a class="el" href="group__system.html#gafe2c7de6567e98e487e009e81e3be10b" title="ChibiOS/RT initialization.">chSysInit()</a></code>. Interrupts are enabled.</li>
<li><b>Suspended</b>. Interrupts are disabled.</li>
<li><b>Disabled</b>. Interrupts are disabled. This state is equivalent to the Suspended state because there are no fast interrupts in this architecture.</li>
<li><b>Sleep</b>. This state is entered with the execution of the specific instruction <code><b>wait</b></code>.</li>
<li><b>S-Locked</b>. Interrupts are disabled.</li>
<li><b>I-Locked</b>. This state is equivalent to the SRI state, the <code>chSysLockI()</code> and <code>chSysUnlockI()</code> APIs do nothing (still use them in order to formally change state because this may change).</li>
<li><b>Serving Regular Interrupt</b>. Normal interrupt service code.</li>
<li><b>Serving Fast Interrupt</b>. Not present in this architecture.</li>
<li><b>Serving Non-Maskable Interrupt</b>. The PowerPC has several non maskable interrupt sources that can be associated to this state.</li>
<li><b>Halted</b>. Implemented as an infinite loop with interrupts disabled.</li>
</ul>
<h2><a class="anchor" id="PPC_NOTES"></a>
The PowerPC port notes</h2>
<p>The PowerPC port is organized as follow:</p>
<ul>
<li>The <code>main()</code> function is invoked in privileged mode.</li>
<li>Each thread has a private stack with extra storage for interrupts servicing.</li>
<li>The Book-E Decrementer Timer, mapped on IVOR10, is used for system tick.</li>
<li>Interrupt nesting is not currently supported.</li>
</ul>
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Modules</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_p_c___c_o_n_f.html">Configuration Options</a></td></tr>
<p><tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight"><p>PowerPC Configuration Options. </p>
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<tr><td class="memItemLeft" align="right" valign="top">&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_p_c___c_o_r_e.html">Core Port Implementation</a></td></tr>
<p><tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight"><p>PowerPC specific port code, structures and macros. </p>
<br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_p_c___s_t_a_r_t_u_p.html">Startup Support</a></td></tr>
<p><tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight"><p>PPC startup code support. </p>
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<tr><td class="memItemLeft" align="right" valign="top">&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_c563___d_r_i_v_e_r_s.html">SPC563 Drivers</a></td></tr>
<p><tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight"><p>Device drivers included in the SPC563 support. </p>
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