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gnuk/ChibiOS_2.0.6/docs/html/struct_p_a_l_config.html
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<h1>PALConfig Struct Reference<br/>
<small>
[<a class="el" href="group___a_t91_s_a_m7___p_a_l.html">AT91SAM7 I/O Ports Support</a>,&nbsp;<a class="el" href="group___l_p_c11xx___p_a_l.html">LPC11xx I/O Ports Support</a>,&nbsp;<a class="el" href="group___l_p_c13xx___p_a_l.html">LPC13xx I/O Ports Support</a>,&nbsp;<a class="el" href="group___l_p_c214x___p_a_l.html">LPC214x I/O Ports Support</a>,&nbsp;<a class="el" href="group___m_s_p430___p_a_l.html">MSP430 I/O Ports Support</a>,&nbsp;<a class="el" href="group___s_t_m32___p_a_l.html">STM32 I/O Ports Support</a>,&nbsp;<a class="el" href="group___s_t_m8___p_a_l.html">STM8 I/O Ports Support</a>]</small>
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<!-- doxytag: class="PALConfig" -->
<p>AT91SAM7 PIO static initializer.
<a href="#_details">More...</a></p>
<p><code>#include &lt;<a class="el" href="platforms_2_a_t91_s_a_m7_2pal__lld_8h_source.html">pal_lld.h</a>&gt;</code></p>
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Collaboration diagram for PALConfig:</div>
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<tr><td colspan="2"><h2><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structat91sam7__pio__setup__t.html">at91sam7_pio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#af2076e58860a5f13bdce3d14034a1efe">P0Data</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port 0 setup data. <a href="#af2076e58860a5f13bdce3d14034a1efe"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structat91sam7__pio__setup__t.html">at91sam7_pio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#ac3bd269a3fe566810553dce03738eed6">P1Data</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port 1 setup data. <a href="#ac3bd269a3fe566810553dce03738eed6"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structlpc111x__gpio__setup__t.html">lpc111x_gpio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a428c6d5a758bdd5872c4d04edc9966a9">P0</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">GPIO 0 setup data. <a href="#a428c6d5a758bdd5872c4d04edc9966a9"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structlpc111x__gpio__setup__t.html">lpc111x_gpio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a35fef102a58bfefc18e7c0ab9f468e10">P1</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">GPIO 1 setup data. <a href="#a35fef102a58bfefc18e7c0ab9f468e10"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structlpc111x__gpio__setup__t.html">lpc111x_gpio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a079ec7b26c4ccab7c8c8c3e038816c8c">P2</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">GPIO 2 setup data. <a href="#a079ec7b26c4ccab7c8c8c3e038816c8c"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structlpc111x__gpio__setup__t.html">lpc111x_gpio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a17172f61aef381e410e1012f9a3490f4">P3</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">GPIO 3 setup data. <a href="#a17172f61aef381e410e1012f9a3490f4"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_l_p_c13xx__gpio__setup__t.html">LPC13xx_gpio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#ad89f0a8287843ab73a4572097a9aa2c7">P0</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">GPIO 0 setup data. <a href="#ad89f0a8287843ab73a4572097a9aa2c7"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_l_p_c13xx__gpio__setup__t.html">LPC13xx_gpio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a64752dd3e58527075bbedc7861605ca8">P1</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">GPIO 1 setup data. <a href="#a64752dd3e58527075bbedc7861605ca8"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_l_p_c13xx__gpio__setup__t.html">LPC13xx_gpio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#afe04fd30780a38aad5ce10c4fcfed92f">P2</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">GPIO 2 setup data. <a href="#afe04fd30780a38aad5ce10c4fcfed92f"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_l_p_c13xx__gpio__setup__t.html">LPC13xx_gpio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a6c817af6188b9e1c7f2e672813a56fc1">P3</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">GPIO 3 setup data. <a href="#a6c817af6188b9e1c7f2e672813a56fc1"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="group___s_t_m8___c_o_r_e.html#ga06896e8c53f721507066c079052171f8">uint32_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a89bd52c585af3d98a1961856111a6f37">pinsel0</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">PINSEL0 initial value. <a href="#a89bd52c585af3d98a1961856111a6f37"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="group___s_t_m8___c_o_r_e.html#ga06896e8c53f721507066c079052171f8">uint32_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a0d690d575741432b3a17f389c3d20350">pinsel1</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">PINSEL1 initial value. <a href="#a0d690d575741432b3a17f389c3d20350"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="group___s_t_m8___c_o_r_e.html#ga06896e8c53f721507066c079052171f8">uint32_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a4ed3f68cffbfc3ca5a9d73cc2b4d9841">pinsel2</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">PINSEL2 initial value. <a href="#a4ed3f68cffbfc3ca5a9d73cc2b4d9841"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structlpc214x__fio__setup__t.html">lpc214x_fio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a0d0a7dfeb9cd81ba3841aa6b6857242c">P0Data</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port 0 setup data. <a href="#a0d0a7dfeb9cd81ba3841aa6b6857242c"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structlpc214x__fio__setup__t.html">lpc214x_fio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a3fd8875de84733ae10125b8b523f8df1">P1Data</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port 1 setup data. <a href="#a3fd8875de84733ae10125b8b523f8df1"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structmsp430__dio__setup__t.html">msp430_dio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a0c183443c3c682416a97ed4bf0358bae">P1Data</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port 1 setup data. <a href="#a0c183443c3c682416a97ed4bf0358bae"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structmsp430__dio__setup__t.html">msp430_dio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#ab81abc8d3526193b4efd5f3e49f7d15a">P2Data</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port 2 setup data. <a href="#ab81abc8d3526193b4efd5f3e49f7d15a"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structmsp430__dio__setup__t.html">msp430_dio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a2dbfcdd16cafdd855a5249a0c9c581fc">P3Data</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port 3 setup data. <a href="#a2dbfcdd16cafdd855a5249a0c9c581fc"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structmsp430__dio__setup__t.html">msp430_dio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#ab0f87c6f6a69b43b09949d7d0ce3f458">P4Data</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port 4 setup data. <a href="#ab0f87c6f6a69b43b09949d7d0ce3f458"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structmsp430__dio__setup__t.html">msp430_dio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a4d7b07a6daf877ed452092fc1f431934">P5Data</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port 5 setup data. <a href="#a4d7b07a6daf877ed452092fc1f431934"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structmsp430__dio__setup__t.html">msp430_dio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a02789e82ef0cfe84c52caface52c0f89">P6Data</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port 6 setup data. <a href="#a02789e82ef0cfe84c52caface52c0f89"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structstm32__gpio__setup__t.html">stm32_gpio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a5267574ed1c464afec6c3deecc122149">PAData</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port A setup data. <a href="#a5267574ed1c464afec6c3deecc122149"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structstm32__gpio__setup__t.html">stm32_gpio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a8191d6ffefa5dc89cc3f8324a967b444">PBData</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port B setup data. <a href="#a8191d6ffefa5dc89cc3f8324a967b444"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structstm32__gpio__setup__t.html">stm32_gpio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a750382332bfb49670a777963a673d708">PCData</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port C setup data. <a href="#a750382332bfb49670a777963a673d708"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structstm32__gpio__setup__t.html">stm32_gpio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a746bbd76c93d426514f221840c45ec49">PDData</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port D setup data. <a href="#a746bbd76c93d426514f221840c45ec49"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structstm32__gpio__setup__t.html">stm32_gpio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#af1e20e47b79fb5fe7932ca665c066a88">PEData</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port E setup data. <a href="#af1e20e47b79fb5fe7932ca665c066a88"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structstm32__gpio__setup__t.html">stm32_gpio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#ae0164ca6471e679bc66aff3085506aa5">PFData</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port F setup data. <a href="#ae0164ca6471e679bc66aff3085506aa5"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structstm32__gpio__setup__t.html">stm32_gpio_setup_t</a>&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_a_l_config.html#a6927b779ec0f7f54271557bfc3c51549">PGData</a></td></tr>
<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Port G setup data. <a href="#a6927b779ec0f7f54271557bfc3c51549"></a><br/></td></tr>
</table>
<hr/><a name="_details"></a><h2>Detailed Description</h2>
<p>AT91SAM7 PIO static initializer. </p>
<p>Generic I/O ports static initializer.</p>
<p>STM32 GPIO static initializer.</p>
<p>MSP430 I/O ports static initializer.</p>
<p>LPC214x FIO static initializer.</p>
<p>GPIO static initializer.</p>
<p>An instance of this structure must be passed to <code><a class="el" href="group___p_a_l.html#ga5a9743283a30e13f2513f5abbcac9f97" title="PAL subsystem initialization.">palInit()</a></code> at system startup time in order to initialize the digital I/O subsystem. This represents only the initial setup, specific pads or whole ports can be reprogrammed at later time.</p>
<p>An instance of this structure must be passed to <code><a class="el" href="group___p_a_l.html#ga5a9743283a30e13f2513f5abbcac9f97" title="PAL subsystem initialization.">palInit()</a></code> at system startup time in order to initialized the digital I/O subsystem. This represents only the initial setup, specific pads or whole ports can be reprogrammed at later time. </p>
<dl class="note"><dt><b>Note:</b></dt><dd>The <code>IOCON</code> block is not configured, initially all pins have enabled pullups and are programmed as GPIO. It is responsibility of the various drivers to reprogram the pins in the proper mode. Pins that are not handled by any driver may be programmed in <code>board.c</code>.</dd></dl>
<p>An instance of this structure must be passed to <code><a class="el" href="group___p_a_l.html#ga5a9743283a30e13f2513f5abbcac9f97" title="PAL subsystem initialization.">palInit()</a></code> at system startup time in order to initialized the digital I/O subsystem. This represents only the initial setup, specific pads or whole ports can be reprogrammed at later time. </p>
<p>Definition at line <a class="el" href="platforms_2_a_t91_s_a_m7_2pal__lld_8h_source.html#l00068">68</a> of file <a class="el" href="platforms_2_a_t91_s_a_m7_2pal__lld_8h_source.html">platforms/AT91SAM7/pal_lld.h</a>.</p>
<hr/><h2>Field Documentation</h2>
<a class="anchor" id="af2076e58860a5f13bdce3d14034a1efe"></a><!-- doxytag: member="PALConfig::P0Data" ref="af2076e58860a5f13bdce3d14034a1efe" args="" -->
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<td class="memname"><a class="el" href="structat91sam7__pio__setup__t.html">at91sam7_pio_setup_t</a> <a class="el" href="struct_p_a_l_config.html#af2076e58860a5f13bdce3d14034a1efe">PALConfig::P0Data</a></td>
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<p>Port 0 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_a_t91_s_a_m7_2pal__lld_8h_source.html#l00070">70</a> of file <a class="el" href="platforms_2_a_t91_s_a_m7_2pal__lld_8h_source.html">platforms/AT91SAM7/pal_lld.h</a>.</p>
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<p>Port 1 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_a_t91_s_a_m7_2pal__lld_8h_source.html#l00074">74</a> of file <a class="el" href="platforms_2_a_t91_s_a_m7_2pal__lld_8h_source.html">platforms/AT91SAM7/pal_lld.h</a>.</p>
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<td class="memname"><a class="el" href="structlpc111x__gpio__setup__t.html">lpc111x_gpio_setup_t</a> <a class="el" href="struct_p_a_l_config.html#a428c6d5a758bdd5872c4d04edc9966a9">PALConfig::P0</a></td>
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<p>GPIO 0 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_l_p_c11xx_2pal__lld_8h_source.html#l00077">77</a> of file <a class="el" href="platforms_2_l_p_c11xx_2pal__lld_8h_source.html">platforms/LPC11xx/pal_lld.h</a>.</p>
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<p>GPIO 1 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_l_p_c11xx_2pal__lld_8h_source.html#l00079">79</a> of file <a class="el" href="platforms_2_l_p_c11xx_2pal__lld_8h_source.html">platforms/LPC11xx/pal_lld.h</a>.</p>
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<p>GPIO 2 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_l_p_c11xx_2pal__lld_8h_source.html#l00081">81</a> of file <a class="el" href="platforms_2_l_p_c11xx_2pal__lld_8h_source.html">platforms/LPC11xx/pal_lld.h</a>.</p>
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<p>GPIO 3 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_l_p_c11xx_2pal__lld_8h_source.html#l00083">83</a> of file <a class="el" href="platforms_2_l_p_c11xx_2pal__lld_8h_source.html">platforms/LPC11xx/pal_lld.h</a>.</p>
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<td class="memname"><a class="el" href="struct_l_p_c13xx__gpio__setup__t.html">LPC13xx_gpio_setup_t</a> <a class="el" href="struct_p_a_l_config.html#a428c6d5a758bdd5872c4d04edc9966a9">PALConfig::P0</a></td>
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<p>GPIO 0 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_l_p_c13xx_2pal__lld_8h_source.html#l00077">77</a> of file <a class="el" href="platforms_2_l_p_c13xx_2pal__lld_8h_source.html">platforms/LPC13xx/pal_lld.h</a>.</p>
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<td class="memname"><a class="el" href="struct_l_p_c13xx__gpio__setup__t.html">LPC13xx_gpio_setup_t</a> <a class="el" href="struct_p_a_l_config.html#a35fef102a58bfefc18e7c0ab9f468e10">PALConfig::P1</a></td>
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<p>GPIO 1 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_l_p_c13xx_2pal__lld_8h_source.html#l00079">79</a> of file <a class="el" href="platforms_2_l_p_c13xx_2pal__lld_8h_source.html">platforms/LPC13xx/pal_lld.h</a>.</p>
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<p>GPIO 2 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_l_p_c13xx_2pal__lld_8h_source.html#l00081">81</a> of file <a class="el" href="platforms_2_l_p_c13xx_2pal__lld_8h_source.html">platforms/LPC13xx/pal_lld.h</a>.</p>
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<p>GPIO 3 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_l_p_c13xx_2pal__lld_8h_source.html#l00083">83</a> of file <a class="el" href="platforms_2_l_p_c13xx_2pal__lld_8h_source.html">platforms/LPC13xx/pal_lld.h</a>.</p>
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<td class="memname"><a class="el" href="group___s_t_m8___c_o_r_e.html#ga06896e8c53f721507066c079052171f8">uint32_t</a> <a class="el" href="struct_p_a_l_config.html#a89bd52c585af3d98a1961856111a6f37">PALConfig::pinsel0</a></td>
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<p>PINSEL0 initial value. </p>
<p>Definition at line <a class="el" href="platforms_2_l_p_c214x_2pal__lld_8h_source.html#l00070">70</a> of file <a class="el" href="platforms_2_l_p_c214x_2pal__lld_8h_source.html">platforms/LPC214x/pal_lld.h</a>.</p>
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<p>PINSEL1 initial value. </p>
<p>Definition at line <a class="el" href="platforms_2_l_p_c214x_2pal__lld_8h_source.html#l00072">72</a> of file <a class="el" href="platforms_2_l_p_c214x_2pal__lld_8h_source.html">platforms/LPC214x/pal_lld.h</a>.</p>
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<p>PINSEL2 initial value. </p>
<p>Definition at line <a class="el" href="platforms_2_l_p_c214x_2pal__lld_8h_source.html#l00074">74</a> of file <a class="el" href="platforms_2_l_p_c214x_2pal__lld_8h_source.html">platforms/LPC214x/pal_lld.h</a>.</p>
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<p>Port 0 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_l_p_c214x_2pal__lld_8h_source.html#l00076">76</a> of file <a class="el" href="platforms_2_l_p_c214x_2pal__lld_8h_source.html">platforms/LPC214x/pal_lld.h</a>.</p>
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<p>Port 1 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_l_p_c214x_2pal__lld_8h_source.html#l00078">78</a> of file <a class="el" href="platforms_2_l_p_c214x_2pal__lld_8h_source.html">platforms/LPC214x/pal_lld.h</a>.</p>
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<p>Port 1 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_m_s_p430_2pal__lld_8h_source.html#l00092">92</a> of file <a class="el" href="platforms_2_m_s_p430_2pal__lld_8h_source.html">platforms/MSP430/pal_lld.h</a>.</p>
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<p>Port 2 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_m_s_p430_2pal__lld_8h_source.html#l00098">98</a> of file <a class="el" href="platforms_2_m_s_p430_2pal__lld_8h_source.html">platforms/MSP430/pal_lld.h</a>.</p>
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<p>Port 3 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_m_s_p430_2pal__lld_8h_source.html#l00104">104</a> of file <a class="el" href="platforms_2_m_s_p430_2pal__lld_8h_source.html">platforms/MSP430/pal_lld.h</a>.</p>
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<p>Port 4 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_m_s_p430_2pal__lld_8h_source.html#l00110">110</a> of file <a class="el" href="platforms_2_m_s_p430_2pal__lld_8h_source.html">platforms/MSP430/pal_lld.h</a>.</p>
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<td class="memname"><a class="el" href="structmsp430__dio__setup__t.html">msp430_dio_setup_t</a> <a class="el" href="struct_p_a_l_config.html#a4d7b07a6daf877ed452092fc1f431934">PALConfig::P5Data</a></td>
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<p>Port 5 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_m_s_p430_2pal__lld_8h_source.html#l00116">116</a> of file <a class="el" href="platforms_2_m_s_p430_2pal__lld_8h_source.html">platforms/MSP430/pal_lld.h</a>.</p>
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<p>Port 6 setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_m_s_p430_2pal__lld_8h_source.html#l00122">122</a> of file <a class="el" href="platforms_2_m_s_p430_2pal__lld_8h_source.html">platforms/MSP430/pal_lld.h</a>.</p>
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<p>Port A setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_s_t_m32_2pal__lld_8h_source.html#l00079">79</a> of file <a class="el" href="platforms_2_s_t_m32_2pal__lld_8h_source.html">platforms/STM32/pal_lld.h</a>.</p>
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<p>Port B setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_s_t_m32_2pal__lld_8h_source.html#l00081">81</a> of file <a class="el" href="platforms_2_s_t_m32_2pal__lld_8h_source.html">platforms/STM32/pal_lld.h</a>.</p>
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<p>Port C setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_s_t_m32_2pal__lld_8h_source.html#l00083">83</a> of file <a class="el" href="platforms_2_s_t_m32_2pal__lld_8h_source.html">platforms/STM32/pal_lld.h</a>.</p>
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<p>Port D setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_s_t_m32_2pal__lld_8h_source.html#l00085">85</a> of file <a class="el" href="platforms_2_s_t_m32_2pal__lld_8h_source.html">platforms/STM32/pal_lld.h</a>.</p>
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<p>Port E setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_s_t_m32_2pal__lld_8h_source.html#l00088">88</a> of file <a class="el" href="platforms_2_s_t_m32_2pal__lld_8h_source.html">platforms/STM32/pal_lld.h</a>.</p>
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<p>Port F setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_s_t_m32_2pal__lld_8h_source.html#l00092">92</a> of file <a class="el" href="platforms_2_s_t_m32_2pal__lld_8h_source.html">platforms/STM32/pal_lld.h</a>.</p>
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<p>Port G setup data. </p>
<p>Definition at line <a class="el" href="platforms_2_s_t_m32_2pal__lld_8h_source.html#l00094">94</a> of file <a class="el" href="platforms_2_s_t_m32_2pal__lld_8h_source.html">platforms/STM32/pal_lld.h</a>.</p>
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