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https://salsa.debian.org/gnuk-team/gnuk/gnuk.git
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82 lines
1.8 KiB
C
82 lines
1.8 KiB
C
#include "config.h"
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#include "ch.h"
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#include "hal.h"
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#include "../common/hwinit.c"
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void
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hwinit1 (void)
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{
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hwinit1_common ();
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#if defined(PINPAD_CIR_SUPPORT)
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/* EXTI5 <= PB5 */
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AFIO->EXTICR[1] = AFIO_EXTICR2_EXTI5_PB;
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EXTI->IMR = 0;
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EXTI->FTSR = EXTI_FTSR_TR5;
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NVICEnableVector(EXTI9_5_IRQn,
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CORTEX_PRIORITY_MASK(CORTEX_MINIMUM_PRIORITY));
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/* TIM3 */
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RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;
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RCC->APB1RSTR = RCC_APB1RSTR_TIM3RST;
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RCC->APB1RSTR = 0;
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NVICEnableVector(TIM3_IRQn,
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CORTEX_PRIORITY_MASK(CORTEX_MINIMUM_PRIORITY));
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TIM3->CR1 = TIM_CR1_URS | TIM_CR1_ARPE; /* Don't enable TIM3 for now */
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TIM3->CR2 = TIM_CR2_TI1S;
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TIM3->SMCR = TIM_SMCR_TS_0 | TIM_SMCR_TS_2 | TIM_SMCR_SMS_2;
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TIM3->DIER = 0; /* Disable interrupt for now */
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TIM3->CCMR1 = TIM_CCMR1_CC1S_0 | TIM_CCMR1_IC1F_0 | TIM_CCMR1_IC1F_3
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| TIM_CCMR1_CC2S_1 | TIM_CCMR1_IC2F_0 | TIM_CCMR1_IC2F_3;
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TIM3->CCMR2 = 0;
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TIM3->CCER = TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC2P;
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TIM3->PSC = 72 - 1; /* 1 MHz */
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TIM3->ARR = 18000; /* 18 ms */
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/* Generate UEV to upload PSC and ARR */
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TIM3->EGR = TIM_EGR_UG;
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#endif
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/* Remap (PB4, PB5) -> (TIM3_CH1, TIM3_CH2) */
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AFIO->MAPR |= AFIO_MAPR_TIM3_REMAP_PARTIALREMAP;
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}
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#if defined(PINPAD_CIR_SUPPORT)
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void
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cir_ext_disable (void)
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{
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EXTI->PR = EXTI_PR_PR5;
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EXTI->IMR &= ~EXTI_IMR_MR5;
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}
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void
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cir_ext_enable (void)
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{
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EXTI->IMR |= EXTI_IMR_MR5;
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}
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extern void cir_ext_interrupt (void);
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extern void cir_timer_interrupt (void);
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CH_IRQ_HANDLER (EXTI9_5_IRQHandler)
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{
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CH_IRQ_PROLOGUE ();
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chSysLockFromIsr ();
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cir_ext_interrupt ();
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chSysUnlockFromIsr ();
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CH_IRQ_EPILOGUE ();
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}
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CH_IRQ_HANDLER (TIM3_IRQHandler)
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{
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CH_IRQ_PROLOGUE();
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chSysLockFromIsr();
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cir_timer_interrupt ();
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chSysUnlockFromIsr();
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CH_IRQ_EPILOGUE();
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}
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#endif
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