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40 lines
824 B
ArmAsm
40 lines
824 B
ArmAsm
/* ARM Thumb Assembler code */
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// arm-none-eabi-gcc -Wa,-amhls=flash_write.lst -c flash_write.S
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#define FLASH_CR_PG 0x0001 // == FLASH_SR_BSY
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#define FLASH_CR_ERRORS 0x0014 // == PGERR | WRPRTERR
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#define FLASH_SR_BSY 0x0001
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#define FLASH_SR_OFFSET 0x0c
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#define FLASH_CR_OFFSET 0x10
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#define COUNT 0x1000
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.cpu cortex-m3
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.thumb
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movw r2, #COUNT
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ldr r0, .SRC_ADDR
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ldr r1, .TARGET_ADDR
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ldr r4, .FLASH_BASE_ADDR
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mov r5, #FLASH_CR_PG
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mov r6, #FLASH_CR_ERRORS
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mov r7, #0
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str r5, [r4, #FLASH_CR_OFFSET]
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0: ldrh r3, [r0, r7]
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strh r3, [r1, r7]
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1: ldr r3, [r4, #FLASH_SR_OFFSET]
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tst r3, r5
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bne 1b
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tst r3, r6
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bne 2f
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add r7, r7, #0x02
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cmp r7, r2
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bne 0b
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2: mov r7, #0
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str r7, [r4, #FLASH_CR_OFFSET]
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bkpt #0x00
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.align 2
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.FLASH_BASE_ADDR: .word 0x40022000
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.SRC_ADDR: .word 0x20000038
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.TARGET_ADDR: .word 0x08000000
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