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<td style="width: 80px;"><img alt="ChibiOS/RT Logo" src="logo_small.png"></td>
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<td><big><big>ChibiOS/RT</big></big><br><br>Architecture - Reference Manual - Guides</td>
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<div class="contents">
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<h1>pal.h File Reference</h1>
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<p>I/O Ports Abstraction Layer macros, types and structures.
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<a href="#_details">More...</a></p>
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<code>#include "<a class="el" href="platforms_2_s_t_m8_2pal__lld_8h_source.html">pal_lld.h</a>"</code><br/>
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<p><a href="pal_8h_source.html">Go to the source code of this file.</a></p>
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<table border="0" cellpadding="0" cellspacing="0">
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<tr><td colspan="2"><h2>Data Structures</h2></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">struct </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_i_o_bus.html">IOBus</a></td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">I/O bus descriptor. <a href="struct_i_o_bus.html#_details">More...</a><br/></td></tr>
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<tr><td colspan="2"><h2>Defines</h2></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga75a61e666497d9486a2d0495a2ad9e83">PAL_MODE_MASK</a> 0xF</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Bits in a mode word dedicated as mode selector. <a href="group___p_a_l.html#ga75a61e666497d9486a2d0495a2ad9e83"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga3f3d0c21b3190fc732a4c51b8d1e6c8d">PAL_MODE_RESET</a> 0</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">After reset state. <a href="group___p_a_l.html#ga3f3d0c21b3190fc732a4c51b8d1e6c8d"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga688f69ad947fc020c9d3840b542e1958">PAL_MODE_UNCONNECTED</a> 1</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Safe state for <b>unconnected</b> pads. <a href="group___p_a_l.html#ga688f69ad947fc020c9d3840b542e1958"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga6a896b827967dc3016560920d7d74d63">PAL_MODE_INPUT</a> 2</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Regular input high-Z pad. <a href="group___p_a_l.html#ga6a896b827967dc3016560920d7d74d63"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#gadb37ffcbe38167c0642f7618f0d5b398">PAL_MODE_INPUT_PULLUP</a> 3</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Input pad with weak pull up resistor. <a href="group___p_a_l.html#gadb37ffcbe38167c0642f7618f0d5b398"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga0b2c436c6b72194e8c81f92c4e8c0312">PAL_MODE_INPUT_PULLDOWN</a> 4</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Input pad with weak pull down resistor. <a href="group___p_a_l.html#ga0b2c436c6b72194e8c81f92c4e8c0312"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga4c506305ade80cef5e580bc65ec54349">PAL_MODE_INPUT_ANALOG</a> 5</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Analog input mode. <a href="group___p_a_l.html#ga4c506305ade80cef5e580bc65ec54349"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#gaedde8679d38abe282c7a70d75a04cda6">PAL_MODE_OUTPUT_PUSHPULL</a> 6</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Push-pull output pad. <a href="group___p_a_l.html#gaedde8679d38abe282c7a70d75a04cda6"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga174456e1b2ba6ce57f196de6db8c846c">PAL_MODE_OUTPUT_OPENDRAIN</a> 7</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Open-drain output pad. <a href="group___p_a_l.html#ga174456e1b2ba6ce57f196de6db8c846c"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#gabdc4b674dd16fd5dbe8aa36b884cf3ed">PAL_LOW</a> 0</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Logical low state. <a href="group___p_a_l.html#gabdc4b674dd16fd5dbe8aa36b884cf3ed"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga6a0e02bcb9a99574ff39d32db9a48f63">PAL_HIGH</a> 1</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Logical high state. <a href="group___p_a_l.html#ga6a0e02bcb9a99574ff39d32db9a48f63"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga7355801d0ad0c2dc5fd181115d899e74">PAL_PORT_BIT</a>(n) ((<a class="el" href="group___s_t_m8___p_a_l.html#ga1648a6c12896a6134fa1fbb7c8bb11fc">ioportmask_t</a>)(1 << (n)))</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Port bit helper macro. <a href="group___p_a_l.html#ga7355801d0ad0c2dc5fd181115d899e74"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga394f79edb774c84dcbaec679df4de24f">PAL_GROUP_MASK</a>(width) ((<a class="el" href="group___s_t_m8___p_a_l.html#ga1648a6c12896a6134fa1fbb7c8bb11fc">ioportmask_t</a>)(1 << (width)) - 1)</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Bits group mask helper. <a href="group___p_a_l.html#ga394f79edb774c84dcbaec679df4de24f"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga9b2ca125fccdac75e7513b597f3a4a39">_IOBUS_DATA</a>(name, port, width, offset) {port, PAL_GROUP_MASK(width), offset}</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Data part of a static I/O bus initializer. <a href="group___p_a_l.html#ga9b2ca125fccdac75e7513b597f3a4a39"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga94861905a3eda098da30009d710fb176">IOBUS_DECL</a>(name, port, width, offset) <a class="el" href="struct_i_o_bus.html">IOBus</a> name = _IOBUS_DATA(name, port, width, offset)</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Static I/O bus initializer. <a href="group___p_a_l.html#ga94861905a3eda098da30009d710fb176"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga5a9743283a30e13f2513f5abbcac9f97">palInit</a>(config) pal_lld_init(config)</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">PAL subsystem initialization. <a href="group___p_a_l.html#ga5a9743283a30e13f2513f5abbcac9f97"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#gaf9df3944b1ef206cce8c42ba5de5e3f9">palReadPort</a>(port) ((void)(port), 0)</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Reads the physical I/O port states. <a href="group___p_a_l.html#gaf9df3944b1ef206cce8c42ba5de5e3f9"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga250da7237d3ccf872944d77d151fce24">palReadLatch</a>(port) ((void)(port), 0)</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Reads the output latch. <a href="group___p_a_l.html#ga250da7237d3ccf872944d77d151fce24"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga7b6d3c589c78f451bc9e1fb080222e71">palWritePort</a>(port, bits) ((void)(port), (void)(bits))</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Writes a bits mask on a I/O port. <a href="group___p_a_l.html#ga7b6d3c589c78f451bc9e1fb080222e71"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#gafd09c5ce655dd5daf9b39cd5f842e422">palSetPort</a>(port, bits)</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Sets a bits mask on a I/O port. <a href="group___p_a_l.html#gafd09c5ce655dd5daf9b39cd5f842e422"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga5ff3b75aeb4fcd1cb82f451f952ab9a9">palClearPort</a>(port, bits)</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Clears a bits mask on a I/O port. <a href="group___p_a_l.html#ga5ff3b75aeb4fcd1cb82f451f952ab9a9"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga55408d900323e7dd43c0fa83337de7ba">palTogglePort</a>(port, bits)</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Toggles a bits mask on a I/O port. <a href="group___p_a_l.html#ga55408d900323e7dd43c0fa83337de7ba"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#gad286cfdb9f088a7c8e5085d19ac728d3">palReadGroup</a>(port, mask, offset) ((palReadPort(port) >> (offset)) & (mask))</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Reads a group of bits. <a href="group___p_a_l.html#gad286cfdb9f088a7c8e5085d19ac728d3"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#gacb25ee0b16d9fb701e3fd21e5dbb990a">palWriteGroup</a>(port, mask, offset, bits)</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Writes a group of bits. <a href="group___p_a_l.html#gacb25ee0b16d9fb701e3fd21e5dbb990a"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga24789efd90288773d2f928458d1dc6e5">palSetGroupMode</a>(port, mask, mode)</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Pads group mode setup. <a href="group___p_a_l.html#ga24789efd90288773d2f928458d1dc6e5"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga06917ae7f34a92d3a04be8e9364dcfbf">palReadPad</a>(port, pad) ((palReadPort(port) >> (pad)) & 1)</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Reads an input pad logical state. <a href="group___p_a_l.html#ga06917ae7f34a92d3a04be8e9364dcfbf"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga1b2ea64780d20f11eedaeb34c5b42daa">palWritePad</a>(port, pad, bit)</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Writes a logical state on an output pad. <a href="group___p_a_l.html#ga1b2ea64780d20f11eedaeb34c5b42daa"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#gaf2c820c1657afa77cdce398329baaf68">palSetPad</a>(port, pad) palSetPort(port, PAL_PORT_BIT(pad))</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Sets a pad logical state to <code>PAL_HIGH</code>. <a href="group___p_a_l.html#gaf2c820c1657afa77cdce398329baaf68"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga4dce65e0515a349a06bea353f2303286">palClearPad</a>(port, pad) palClearPort(port, PAL_PORT_BIT(pad))</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Clears a pad logical state to <code>PAL_LOW</code>. <a href="group___p_a_l.html#ga4dce65e0515a349a06bea353f2303286"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga76b4f6024add76681d618f5ac7daeedf">palTogglePad</a>(port, pad) palTogglePort(port, PAL_PORT_BIT(pad))</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Toggles a pad logical state. <a href="group___p_a_l.html#ga76b4f6024add76681d618f5ac7daeedf"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#gab6377829df3700e742044a2e669c7db7">palSetPadMode</a>(port, pad, mode) palSetGroupMode(port, PAL_PORT_BIT(pad), mode)</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Pad mode setup. <a href="group___p_a_l.html#gab6377829df3700e742044a2e669c7db7"></a><br/></td></tr>
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<tr><td colspan="2"><h2>Functions</h2></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="group___s_t_m8___p_a_l.html#ga1648a6c12896a6134fa1fbb7c8bb11fc">ioportmask_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#gac464cacee6890a3eab2e2db1b7d8d6f9">palReadBus</a> (<a class="el" href="struct_i_o_bus.html">IOBus</a> *bus)</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Read from an I/O bus. <a href="group___p_a_l.html#gac464cacee6890a3eab2e2db1b7d8d6f9"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga486b5ab6062e6a8f9d5efdd7a8908a79">palWriteBus</a> (<a class="el" href="struct_i_o_bus.html">IOBus</a> *bus, <a class="el" href="group___s_t_m8___p_a_l.html#ga1648a6c12896a6134fa1fbb7c8bb11fc">ioportmask_t</a> bits)</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Write to an I/O bus. <a href="group___p_a_l.html#ga486b5ab6062e6a8f9d5efdd7a8908a79"></a><br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___p_a_l.html#ga25ef645e442638716008408357f4ea59">palSetBusMode</a> (<a class="el" href="struct_i_o_bus.html">IOBus</a> *bus, <a class="el" href="group___s_t_m8___c_o_r_e.html#gad0fca8b15c218d2c687f8c373a71d228">uint_fast8_t</a> mode)</td></tr>
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<tr><td class="mdescLeft"> </td><td class="mdescRight">Programs a bus with the specified mode. <a href="group___p_a_l.html#ga25ef645e442638716008408357f4ea59"></a><br/></td></tr>
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</table>
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<hr/><a name="_details"></a><h2>Detailed Description</h2>
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<p>I/O Ports Abstraction Layer macros, types and structures. </p>
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<p>Definition in file <a class="el" href="pal_8h_source.html">pal.h</a>.</p>
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</div>
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<hr size="1"><address style="text-align: right;"><small>
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Generated on Sun Jul 11 13:13:02 2010 for ChibiOS/RT by <a href="http://www.doxygen.org/index.html"><img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.6.3</small></address>
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