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https://salsa.debian.org/gnuk-team/gnuk/gnuk.git
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1593 lines
30 KiB
C
1593 lines
30 KiB
C
/******************** (C) COPYRIGHT 2010 STMicroelectronics ********************
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* File Name : otgd_fs_regs.h
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* Author : STMicroelectronics
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* Version : V3.1.1
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* Date : 04/07/2010
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* Description : USB OTG IP hardware registers.
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********************************************************************************
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* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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#ifndef __USB_OTG_REGS_H__
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#define __USB_OTG_REGS_H__
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#ifdef STM32F10X_CL
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#include "stm32f10x.h"
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#include "usb_type.h"
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#define USB_OTG_FS1_BASE_ADDR 0x50000000
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#define USB_OTG_CORE_GLOBAL_REGS_OFFSET 0x000
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#define USB_OTG_DEV_GLOBAL_REG_OFFSET 0x800
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#define USB_OTG_DEV_IN_EP_REG_OFFSET 0x900
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#define USB_OTG_EP_REG_OFFSET 0x20
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#define USB_OTG_DEV_OUT_EP_REG_OFFSET 0xB00
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#define USB_OTG_HOST_GLOBAL_REG_OFFSET 0x400
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#define USB_OTG_HOST_PORT_REGS_OFFSET 0x440
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#define USB_OTG_HOST_CHAN_REGS_OFFSET 0x500
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#define USB_OTG_CHAN_REGS_OFFSET 0x20
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#define USB_OTG_PCGCCTL_OFFSET 0xE00
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#define USB_OTG_DATA_FIFO_OFFSET 0x1000
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#define USB_OTG_DATA_FIFO_SIZE 0x1000
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#define MAX_PERIO_FIFOS 8
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#define MAX_TX_FIFOS 4
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#define MAX_EPS_CHANNELS 8
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/*******************************************************************************
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* USB_OTG Core registers .
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* The USB_OTG_core_regs structure defines the size
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* and relative field offsets for the Core Global registers.
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******************************************************************************/
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typedef struct _USB_OTG_common_regs //000h
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{
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__IO uint32_t otg_ctl; /* USB_OTG Control and Status Register 000h*/
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__IO uint32_t otg_int; /* USB_OTG Interrupt Register 004h*/
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__IO uint32_t ahb_cfg; /* Core AHB Configuration Register 008h*/
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__IO uint32_t usb_cfg; /* Core USB Configuration Register 00Ch*/
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__IO uint32_t rst_ctl; /* Core Reset Register 010h*/
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__IO uint32_t int_sts; /* Core Interrupt Register 014h*/
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__IO uint32_t int_msk; /* Core Interrupt Mask Register 018h*/
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__IO uint32_t rx_stsr; /* Receive Sts Q Read Register 01Ch*/
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__IO uint32_t rx_stsp; /* Receive Sts Q Read & POP Register 020h*/
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__IO uint32_t rx_fifo_siz; /* Receive FIFO Size Register 024h*/
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__IO uint32_t np_tx_fifo_siz; /* Non Periodic Tx FIFO Size Register 028h*/
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__IO uint32_t np_tx_sts; /* Non Periodic Tx FIFO/Queue Sts reg 02Ch*/
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__IO uint32_t i2c_ctl; /* I2C Access Register 030h*/
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__IO uint32_t phy_vnd_ctl; /* PHY Vendor Control Register 034h*/
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__IO uint32_t gpio; /* General Purpose IO Register 038h*/
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__IO uint32_t usr_id; /* User ID Register 03Ch*/
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__IO uint32_t snps_id; /* Synopsys ID Register 040h*/
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__IO uint32_t hw_cfg1; /* User HW Config1 Register (RO) 044h*/
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__IO uint32_t hw_cfg2; /* User HW Config2 Register (RO) 048h*/
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__IO uint32_t hw_cfg3; /* User HW Config3 Register (RO) 04Ch*/
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__IO uint32_t hw_cfg4; /* User HW Config4 Register (RO) 050h*/
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uint32_t reserved[43]; /* Reserved 054h-0FFh*/
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__IO uint32_t host_p_tx_fifo_siz; /* Host Periodic Tx FIFO Size Reg 100h*/
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__IO uint32_t dev_p_tx_fsiz_dieptxf[15];/* dev Periodic Transmit FIFO */
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}
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USB_OTG_common_regs;
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/*******************************************************************************
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* dev Registers
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* dev Global Registers : Offsets 800h-BFFh
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* The following structures define the size and relative field offsets
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* for the dev Mode Registers.
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* These registers are visible only in dev mode and must not be
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* accessed in Host mode, as the results are unknown
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******************************************************************************/
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typedef struct _USB_OTG_dev_regs // 800h
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{
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__IO uint32_t dev_cfg; /* dev Configuration Register 800h*/
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__IO uint32_t dev_ctl; /* dev Control Register 804h*/
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__IO uint32_t dev_sts; /* dev Status Register (RO) 808h*/
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uint32_t reserved3; /* Reserved 80Ch*/
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__IO uint32_t dev_in_ep_msk; /* dev IN Endpoint Mask 810h*/
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__IO uint32_t dev_out_ep_msk; /* dev OUT Endpoint Mask 814h*/
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__IO uint32_t dev_all_int; /* dev All Endpoints Itr Reg 818h*/
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__IO uint32_t dev_all_int_msk; /* dev All Endpoints Itr Mask 81Ch*/
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uint32_t Reserved8; /* Reserved 820h*/
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__IO uint32_t Reserved9; /* Reserved 824h*/
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__IO uint32_t dev_vbus_dis; /* dev VBUS discharge Register 828h*/
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__IO uint32_t dev_vbus_pulse; /* dev VBUS Pulse Register 82Ch*/
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__IO uint32_t dev_thr_ctl; /* dev thr 830h*/
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__IO uint32_t dev_fifo_empty_msk; /* dev empty msk 834h*/
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}
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USB_OTG_dev_regs;
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/*******************************************************************************
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* dev Logical IN Endpoint-Specific Registers: Offsets 900h-AFCh
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* There will be one set of endpoint registers per logical endpointimplemented.
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* These registers are visible only in dev mode and must not be
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* accessed in Host mode, as the results are unknown
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*******************************************************************************/
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typedef struct _USB_OTG_dev_in_ep_regs
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{
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__IO uint32_t dev_in_ep_ctl; /* dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h*/
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uint32_t reserved04; /* Reserved 900h + (ep_num * 20h) + 04h*/
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__IO uint32_t dev_in_ep_int; /* dev IN Endpoint Itr Reg 900h + (ep_num * 20h) + 08h*/
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uint32_t reserved0C; /* Reserved 900h + (ep_num * 20h) + 0Ch*/
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__IO uint32_t dev_in_ep_txfer_siz; /* IN Endpoint Txfer Size 900h + (ep_num * 20h) + 10h*/
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__IO uint32_t dev_in_ep_dma; /* IN Endpoint DMA Address Reg 900h + (ep_num * 20h) + 14h*/
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__IO uint32_t dev_tx_fifo_sts;/*IN Endpoint Tx FIFO Status Reg 900h + (ep_num * 20h) + 18h*/
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uint32_t reserved18; /* Reserved 900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/
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}
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USB_OTG_dev_in_ep_regs;
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/*******************************************************************************
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* dev Logical OUT Endpoint-Specific Registers Offsets: B00h-CFCh
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* There will be one set of endpoint registers per logical endpoint
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* implemented.
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* These registers are visible only in dev mode and must not be
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* accessed in Host mode, as the results are unknown
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******************************************************************************/
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typedef struct _USB_OTG_dev_out_ep_regs
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{
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__IO uint32_t dev_out_ep_ctl; /* dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h*/
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__IO uint32_t dev_out_ep_frm_nbr; /* dev OUT Endpoint Frame number B00h + (ep_num * 20h) + 04h*/
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__IO uint32_t dev_out_ep_int; /* dev OUT Endpoint Itr Reg B00h + (ep_num * 20h) + 08h*/
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uint32_t reserved0C; /* Reserved B00h + (ep_num * 20h) + 0Ch*/
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__IO uint32_t dev_out_ep_txfer_siz; /* dev OUT Endpoint Txfer Size B00h + (ep_num * 20h) + 10h*/
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__IO uint32_t dev_out_ep_dma; /* dev OUT Endpoint DMA Address B00h + (ep_num * 20h) + 14h*/
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uint32_t reserved18[2]; /* Reserved B00h + (ep_num * 20h) + 18h - B00h + (ep_num * 20h) + 1Ch*/
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}
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USB_OTG_dev_out_ep_regs;
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/*******************************************************************************
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* Host Mode Register Structures
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* The Host Global Registers structure defines the size and relative
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* field offsets for the Host Mode Global Registers.
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* Host Global Registers offsets 400h-7FFh.
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*******************************************************************************/
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typedef struct _USB_OTG_host_regs
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{
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__IO uint32_t host_cfg; /* Host Configuration Register 400h*/
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__IO uint32_t host_frm_intrvl; /* Host Frame Interval Register 404h*/
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__IO uint32_t host_frm_nbr; /* Host Frame Nbr/Frame Remaining 408h*/
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uint32_t reserved40C; /* Reserved 40Ch*/
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__IO uint32_t host_p_tx_sts; /* Host Periodic Tx FIFO/ Queue Status 410h*/
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__IO uint32_t host_all_int; /* Host All Channels Interrupt Register 414h*/
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__IO uint32_t host_all_int_msk; /* Host All Channels Interrupt Mask 418h*/
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}
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USB_OTG_host_regs;
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/*******************************************************************************
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* Host Channel Specific Registers 500h-5FCh
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*******************************************************************************/
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typedef struct _USB_OTG_hc_regs
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{
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__IO uint32_t hc_char;
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__IO uint32_t hc_split;
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__IO uint32_t hc_int;
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__IO uint32_t hc_int_msk;
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__IO uint32_t hc_txfer_siz;
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__IO uint32_t hc_dma;
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uint32_t reserved[2];
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}
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USB_OTG_hc_regs;
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/*******************************************************************************
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* otg Core registers .
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* The USB_OTG_core_regs structure defines the size
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* and relative field offsets for the Core Global registers.
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******************************************************************************/
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typedef struct USB_OTG_core_regs //000h
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{
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USB_OTG_common_regs *common_regs;
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USB_OTG_dev_regs *dev_regs;
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USB_OTG_host_regs *host_regs;
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USB_OTG_dev_in_ep_regs *inep_regs[MAX_EPS_CHANNELS];
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USB_OTG_dev_out_ep_regs *outep_regs[MAX_EPS_CHANNELS];
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USB_OTG_hc_regs *hc_regs[MAX_EPS_CHANNELS];
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__IO uint32_t *hprt0;
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__IO uint32_t *data_fifo[MAX_EPS_CHANNELS];
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__IO uint32_t *pcgcctl;
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}
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USB_OTG_CORE_REGS , *pUSB_OTG_CORE_REGS;
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/******************************************************************************/
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typedef union _USB_OTG_OTG_ctl_data
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{
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uint32_t d32;
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struct
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{
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uint32_t sesreqscs :
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1;
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uint32_t sesreq :
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1;
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uint32_t reserved2_7 :
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6;
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uint32_t hstnegscs :
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1;
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uint32_t hnpreq :
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1;
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uint32_t hstsethnpen :
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1;
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uint32_t devhnpen :
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1;
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uint32_t reserved12_15 :
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4;
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uint32_t conidsts :
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1;
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uint32_t reserved17 :
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1;
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uint32_t asesvld :
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1;
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uint32_t bsesvld :
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1;
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uint32_t currmod :
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1;
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uint32_t reserved21_31 :
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11;
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}
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b;
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} USB_OTG_OTG_ctl_data;
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/******************************************************************************/
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typedef union _USB_OTG_OTG_int_data
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{
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uint32_t d32;
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struct
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{
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uint32_t reserved0_1 :
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2;
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uint32_t sesenddet :
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1;
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uint32_t reserved3_7 :
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5;
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uint32_t sesreqsucstschng :
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1;
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uint32_t hstnegsucstschng :
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1;
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uint32_t reserver10_16 :
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7;
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uint32_t hstnegdet :
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1;
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uint32_t adevtoutchng :
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1;
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uint32_t debdone :
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1;
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uint32_t reserved31_20 :
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12;
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}
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b;
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} USB_OTG_OTG_int_data;
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/******************************************************************************/
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typedef union _USB_OTG_ahb_cfg_data
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{
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uint32_t d32;
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struct
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{
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uint32_t glblintrmsk :
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1;
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uint32_t hburstlen :
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4;
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uint32_t dmaenable :
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1;
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uint32_t reserved :
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1;
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uint32_t nptxfemplvl_txfemplvl :
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1;
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uint32_t ptxfemplvl :
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1;
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uint32_t reserved9_31 :
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23;
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}
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b;
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} USB_OTG_ahb_cfg_data;
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/******************************************************************************/
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typedef union _USB_OTG_usb_cfg_data
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{
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uint32_t d32;
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struct
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{
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uint32_t toutcal :
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3;
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uint32_t phyif :
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1;
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uint32_t ulpi_utmi_sel :
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1;
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uint32_t fsintf :
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1;
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uint32_t physel :
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1;
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uint32_t ddrsel :
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1;
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uint32_t srpcap :
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1;
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uint32_t hnpcap :
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1;
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uint32_t usbtrdtim :
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4;
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uint32_t nptxfrwnden :
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1;
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uint32_t phylpwrclksel :
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1;
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uint32_t otgutmifssel :
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1;
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uint32_t ulpi_fsls :
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1;
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uint32_t ulpi_auto_res :
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1;
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uint32_t ulpi_clk_sus_m :
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1;
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uint32_t ulpi_ext_vbus_drv :
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1;
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uint32_t ulpi_int_vbus_indicator :
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1;
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uint32_t term_sel_dl_pulse :
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1;
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uint32_t reserved :
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6;
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uint32_t force_host :
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1;
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uint32_t force_dev :
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1;
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uint32_t corrupt_tx :
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1;
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}
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b;
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} USB_OTG_usb_cfg_data;
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/******************************************************************************/
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typedef union _USB_OTG_rst_ctl_data
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{
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uint32_t d32;
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struct
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{
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uint32_t csftrst :
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1;
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uint32_t hsftrst :
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1;
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uint32_t hstfrm :
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1;
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uint32_t intknqflsh :
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1;
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uint32_t rxfflsh :
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1;
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uint32_t txfflsh :
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1;
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uint32_t txfnum :
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5;
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uint32_t reserved11_29 :
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19;
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uint32_t dmareq :
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1;
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uint32_t ahbidle :
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1;
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}
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b;
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} USB_OTG_rst_ctl_data;
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/******************************************************************************/
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typedef union _USB_OTG_int_msk_data
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{
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uint32_t d32;
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struct
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{
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uint32_t reserved0 :
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1;
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uint32_t modemismatch :
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1;
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uint32_t otgintr :
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1;
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uint32_t sofintr :
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1;
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uint32_t rxstsqlvl :
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1;
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uint32_t nptxfempty :
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1;
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uint32_t ginnakeff :
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1;
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uint32_t goutnakeff :
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1;
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uint32_t reserved8 :
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1;
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uint32_t i2cintr :
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1;
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uint32_t erlysuspend :
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1;
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uint32_t usbsuspend :
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1;
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uint32_t usbreset :
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1;
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uint32_t enumdone :
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1;
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uint32_t isooutdrop :
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1;
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uint32_t eopframe :
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1;
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uint32_t reserved16 :
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1;
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uint32_t epmismatch :
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1;
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uint32_t inepintr :
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1;
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uint32_t outepintr :
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1;
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uint32_t incomplisoin :
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1;
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uint32_t incomplisoout :
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1;
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uint32_t reserved22_23 :
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2;
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uint32_t portintr :
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1;
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uint32_t hcintr :
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1;
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uint32_t ptxfempty :
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1;
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uint32_t reserved27 :
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1;
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uint32_t conidstschng :
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1;
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uint32_t disconnect :
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1;
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uint32_t sessreqintr :
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1;
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uint32_t wkupintr :
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1;
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}
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b;
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} USB_OTG_int_msk_data;
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/******************************************************************************/
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typedef union _USB_OTG_int_sts_data
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{
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uint32_t d32;
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struct
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{
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uint32_t curmode :
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1;
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uint32_t modemismatch :
|
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1;
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uint32_t otgintr :
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1;
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uint32_t sofintr :
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1;
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uint32_t rxstsqlvl :
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1;
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uint32_t nptxfempty :
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1;
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uint32_t ginnakeff :
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1;
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uint32_t goutnakeff :
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1;
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uint32_t reserved8 :
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1;
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uint32_t i2cintr :
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1;
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uint32_t erlysuspend :
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1;
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uint32_t usbsuspend :
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1;
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uint32_t usbreset :
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1;
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uint32_t enumdone :
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1;
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uint32_t isooutdrop :
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1;
|
|
uint32_t eopframe :
|
|
1;
|
|
uint32_t intokenrx :
|
|
1;
|
|
uint32_t epmismatch :
|
|
1;
|
|
uint32_t inepint:
|
|
1;
|
|
uint32_t outepintr :
|
|
1;
|
|
uint32_t incomplisoin :
|
|
1;
|
|
uint32_t incomplisoout :
|
|
1;
|
|
uint32_t reserved22_23 :
|
|
2;
|
|
uint32_t portintr :
|
|
1;
|
|
uint32_t hcintr :
|
|
1;
|
|
uint32_t ptxfempty :
|
|
1;
|
|
uint32_t reserved27 :
|
|
1;
|
|
uint32_t conidstschng :
|
|
1;
|
|
uint32_t disconnect :
|
|
1;
|
|
uint32_t sessreqintr :
|
|
1;
|
|
uint32_t wkupintr :
|
|
1;
|
|
}
|
|
b;
|
|
} USB_OTG_int_sts_data;
|
|
|
|
/******************************************************************************/
|
|
typedef union _USB_OTG_dev_rx_sts_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t epnum :
|
|
4;
|
|
uint32_t bcnt :
|
|
11;
|
|
uint32_t dpid :
|
|
2;
|
|
uint32_t pktsts :
|
|
4;
|
|
uint32_t fn :
|
|
4;
|
|
uint32_t reserved :
|
|
7;
|
|
}
|
|
b;
|
|
} USB_OTG_dev_rx_sts_data;
|
|
|
|
/******************************************************************************/
|
|
typedef union _USB_OTG_host_rx_sts_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t chnum :
|
|
4;
|
|
uint32_t bcnt :
|
|
11;
|
|
uint32_t dpid :
|
|
2;
|
|
uint32_t pktsts :
|
|
4;
|
|
uint32_t reserved :
|
|
11;
|
|
}
|
|
b;
|
|
} USB_OTG_host_rx_sts_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_fifo_size_data
|
|
{
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t startaddr :
|
|
16;
|
|
uint32_t depth :
|
|
16;
|
|
}
|
|
b;
|
|
} USB_OTG_fifo_size_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_np_tx_sts_data
|
|
{
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t nptxfspcavail :
|
|
16;
|
|
uint32_t nptxqspcavail :
|
|
8;
|
|
uint32_t nptxqtop_terminate :
|
|
1;
|
|
uint32_t nptxqtop_token :
|
|
2;
|
|
uint32_t nptxqtop_chnep :
|
|
4;
|
|
uint32_t reserved :
|
|
1;
|
|
}
|
|
b;
|
|
} USB_OTG_np_tx_sts_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_dev_tx_fifo_sts_data
|
|
{
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t txfspcavail :
|
|
16;
|
|
uint32_t reserved :
|
|
16;
|
|
}
|
|
b;
|
|
} USB_OTG_dev_tx_fifo_sts_data;
|
|
|
|
/******************************************************************************/
|
|
typedef union _USB_OTG_i2c_ctl_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t rwdata :
|
|
8;
|
|
uint32_t regaddr :
|
|
8;
|
|
uint32_t addr :
|
|
7;
|
|
uint32_t i2cen :
|
|
1;
|
|
uint32_t ack :
|
|
1;
|
|
uint32_t i2csuspctl :
|
|
1;
|
|
uint32_t i2cdevaddr :
|
|
2;
|
|
uint32_t dat_se0:
|
|
1;
|
|
uint32_t reserved :
|
|
1;
|
|
uint32_t rw :
|
|
1;
|
|
uint32_t bsydne :
|
|
1;
|
|
}
|
|
b;
|
|
} USB_OTG_i2c_ctl_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_gpio_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
/* input */
|
|
uint32_t ovrcur :
|
|
1;
|
|
uint32_t otgid :
|
|
1;
|
|
uint32_t reserved_in :
|
|
14;
|
|
/* Output */
|
|
uint32_t pwdn :
|
|
1;
|
|
uint32_t i2cifen :
|
|
1;
|
|
uint32_t vbussensingA :
|
|
1;
|
|
uint32_t vbussensingB :
|
|
1;
|
|
uint32_t SOFouten :
|
|
1;
|
|
uint32_t reserved_out :
|
|
11;
|
|
}
|
|
b;
|
|
} USB_OTG_gpio_data;
|
|
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_hw_cfg1_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t ep_dir0 :
|
|
2;
|
|
uint32_t ep_dir1 :
|
|
2;
|
|
uint32_t ep_dir2 :
|
|
2;
|
|
uint32_t ep_dir3 :
|
|
2;
|
|
uint32_t ep_dir4 :
|
|
2;
|
|
uint32_t ep_dir5 :
|
|
2;
|
|
uint32_t ep_dir6 :
|
|
2;
|
|
uint32_t ep_dir7 :
|
|
2;
|
|
uint32_t ep_dir8 :
|
|
2;
|
|
uint32_t ep_dir9 :
|
|
2;
|
|
uint32_t ep_dir10 :
|
|
2;
|
|
uint32_t ep_dir11 :
|
|
2;
|
|
uint32_t ep_dir12 :
|
|
2;
|
|
uint32_t ep_dir13 :
|
|
2;
|
|
uint32_t ep_dir14 :
|
|
2;
|
|
uint32_t ep_dir15 :
|
|
2;
|
|
}
|
|
b;
|
|
} USB_OTG_hw_cfg1_data;
|
|
|
|
/******************************************************************************/
|
|
typedef union _USB_OTG_hw_cfg2_data
|
|
{
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t op_mode :
|
|
3;
|
|
uint32_t architecture :
|
|
2;
|
|
uint32_t point2point :
|
|
1;
|
|
uint32_t hs_phy_type :
|
|
2;
|
|
uint32_t fs_phy_type :
|
|
2;
|
|
uint32_t num_dev_ep :
|
|
4;
|
|
uint32_t num_host_chan :
|
|
4;
|
|
uint32_t perio_ep_supported :
|
|
1;
|
|
uint32_t dynamic_fifo :
|
|
1;
|
|
uint32_t rx_status_q_depth :
|
|
2;
|
|
uint32_t nonperio_tx_q_depth :
|
|
2;
|
|
uint32_t host_perio_tx_q_depth :
|
|
2;
|
|
uint32_t dev_token_q_depth :
|
|
5;
|
|
uint32_t reserved31 :
|
|
1;
|
|
}
|
|
b;
|
|
} USB_OTG_hw_cfg2_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_hw_cfg3_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t xfer_size_cntr_width :
|
|
4;
|
|
uint32_t packet_size_cntr_width :
|
|
3;
|
|
uint32_t otg_func :
|
|
1;
|
|
uint32_t i2c :
|
|
1;
|
|
uint32_t vendor_ctrl_if :
|
|
1;
|
|
uint32_t optional_features :
|
|
1;
|
|
uint32_t synch_reset_type :
|
|
1;
|
|
uint32_t ahb_phy_clock_synch :
|
|
1;
|
|
uint32_t reserved15_13 :
|
|
3;
|
|
uint32_t dfifo_depth :
|
|
16;
|
|
}
|
|
b;
|
|
} USB_OTG_hw_cfg3_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_hw_cfg4_data
|
|
{
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t num_dev_perio_in_ep :
|
|
4;
|
|
uint32_t power_optimiz :
|
|
1;
|
|
uint32_t min_ahb_freq :
|
|
9;
|
|
uint32_t utmi_phy_data_width :
|
|
2;
|
|
uint32_t num_dev_mode_ctrl_ep :
|
|
4;
|
|
uint32_t iddig_filt_en :
|
|
1;
|
|
uint32_t vbus_valid_filt_en :
|
|
1;
|
|
uint32_t a_valid_filt_en :
|
|
1;
|
|
uint32_t b_valid_filt_en :
|
|
1;
|
|
uint32_t session_end_filt_en :
|
|
1;
|
|
uint32_t ded_fifo_en :
|
|
1;
|
|
uint32_t num_in_eps :
|
|
4;
|
|
uint32_t reserved31_30 :
|
|
2;
|
|
}
|
|
b;
|
|
} USB_OTG_hw_cfg4_data;
|
|
|
|
/******************************************************************************/
|
|
typedef union _USB_OTG_dev_cfg_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t devspd :
|
|
2;
|
|
uint32_t nzstsouthshk :
|
|
1;
|
|
uint32_t reserved3 :
|
|
1;
|
|
uint32_t devaddr :
|
|
7;
|
|
uint32_t perfrint :
|
|
2;
|
|
uint32_t reserved13_17 :
|
|
5;
|
|
uint32_t epmscnt :
|
|
4;
|
|
}
|
|
b;
|
|
} USB_OTG_dev_cfg_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_dev_ctl_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t rmtwkupsig :
|
|
1;
|
|
uint32_t sftdiscon :
|
|
1;
|
|
uint32_t gnpinnaksts :
|
|
1;
|
|
uint32_t goutnaksts :
|
|
1;
|
|
uint32_t tstctl :
|
|
3;
|
|
uint32_t sgnpinnak :
|
|
1;
|
|
uint32_t cgnpinnak :
|
|
1;
|
|
uint32_t sgoutnak :
|
|
1;
|
|
uint32_t cgoutnak :
|
|
1;
|
|
uint32_t reserved :
|
|
21;
|
|
}
|
|
b;
|
|
} USB_OTG_dev_ctl_data;
|
|
|
|
/******************************************************************************/
|
|
typedef union _USB_OTG_dev_sts_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t suspsts :
|
|
1;
|
|
uint32_t enumspd :
|
|
2;
|
|
uint32_t errticerr :
|
|
1;
|
|
uint32_t reserved4_7:
|
|
4;
|
|
uint32_t soffn :
|
|
14;
|
|
uint32_t reserved22_31 :
|
|
10;
|
|
}
|
|
b;
|
|
} USB_OTG_dev_sts_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_dev_in_ep_int_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t xfercompl :
|
|
1;
|
|
uint32_t epdisabled :
|
|
1;
|
|
uint32_t ahberr :
|
|
1;
|
|
uint32_t timeout :
|
|
1;
|
|
uint32_t intktxfemp :
|
|
1;
|
|
uint32_t intknepmis :
|
|
1;
|
|
uint32_t inepnakeff :
|
|
1;
|
|
uint32_t emptyintr :
|
|
1;
|
|
uint32_t txfifoundrn :
|
|
1;
|
|
uint32_t reserved08_31 :
|
|
23;
|
|
}
|
|
b;
|
|
} USB_OTG_dev_in_ep_int_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_dev_in_ep_int_data USB_OTG_dev_in_ep_msk_data;
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_dev_out_ep_int_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t xfercompl :
|
|
1;
|
|
uint32_t epdisabled :
|
|
1;
|
|
uint32_t ahberr :
|
|
1;
|
|
uint32_t setup :
|
|
1;
|
|
uint32_t reserved04_31 :
|
|
28;
|
|
}
|
|
b;
|
|
} USB_OTG_dev_out_ep_int_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_dev_out_ep_int_data USB_OTG_dev_out_ep_msk_data;
|
|
|
|
/******************************************************************************/
|
|
typedef union _USB_OTG_dev_all_int_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t in :
|
|
16;
|
|
uint32_t out :
|
|
16;
|
|
}
|
|
ep;
|
|
struct
|
|
{
|
|
/** IN Endpoint bits */
|
|
uint32_t inep0 :
|
|
1;
|
|
uint32_t inep1 :
|
|
1;
|
|
uint32_t inep2 :
|
|
1;
|
|
uint32_t inep3 :
|
|
1;
|
|
uint32_t inep4 :
|
|
1;
|
|
uint32_t inep5 :
|
|
1;
|
|
uint32_t inep6 :
|
|
1;
|
|
uint32_t inep7 :
|
|
1;
|
|
uint32_t inep8 :
|
|
1;
|
|
uint32_t inep9 :
|
|
1;
|
|
uint32_t inep10 :
|
|
1;
|
|
uint32_t inep11 :
|
|
1;
|
|
uint32_t inep12 :
|
|
1;
|
|
uint32_t inep13 :
|
|
1;
|
|
uint32_t inep14 :
|
|
1;
|
|
uint32_t inep15 :
|
|
1;
|
|
/** OUT Endpoint bits */
|
|
uint32_t outep0 :
|
|
1;
|
|
uint32_t outep1 :
|
|
1;
|
|
uint32_t outep2 :
|
|
1;
|
|
uint32_t outep3 :
|
|
1;
|
|
uint32_t outep4 :
|
|
1;
|
|
uint32_t outep5 :
|
|
1;
|
|
uint32_t outep6 :
|
|
1;
|
|
uint32_t outep7 :
|
|
1;
|
|
uint32_t outep8 :
|
|
1;
|
|
uint32_t outep9 :
|
|
1;
|
|
uint32_t outep10 :
|
|
1;
|
|
uint32_t outep11 :
|
|
1;
|
|
uint32_t outep12 :
|
|
1;
|
|
uint32_t outep13 :
|
|
1;
|
|
uint32_t outep14 :
|
|
1;
|
|
uint32_t outep15 :
|
|
1;
|
|
}
|
|
b;
|
|
} USB_OTG_dev_all_int_data;
|
|
|
|
/******************************************************************************/
|
|
typedef union _USB_OTG_token_qr1_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t intknwptr :
|
|
5;
|
|
uint32_t reserved05_06 :
|
|
2;
|
|
uint32_t wrap_bit :
|
|
1;
|
|
uint32_t epnums0_5 :
|
|
24;
|
|
}
|
|
b;
|
|
} USB_OTG_token_qr1_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_dev_thr_ctl_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t non_iso_thr_en :
|
|
1;
|
|
uint32_t iso_thr_en :
|
|
1;
|
|
uint32_t tx_thr_len :
|
|
9;
|
|
uint32_t reserved11_15 :
|
|
5;
|
|
uint32_t rx_thr_en :
|
|
1;
|
|
uint32_t rx_thr_len :
|
|
9;
|
|
uint32_t reserved26_31 :
|
|
6;
|
|
}
|
|
b;
|
|
} USB_OTG_dev_thr_ctl_data;
|
|
|
|
/******************************************************************************/
|
|
typedef union _USB_OTG_dev_ep_ctl_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t mps :
|
|
11;
|
|
uint32_t nextep :
|
|
4;
|
|
uint32_t usbactep :
|
|
1;
|
|
uint32_t dpid :
|
|
1;
|
|
uint32_t naksts :
|
|
1;
|
|
uint32_t eptype :
|
|
2;
|
|
uint32_t snp :
|
|
1;
|
|
uint32_t stall :
|
|
1;
|
|
uint32_t txfnum :
|
|
4;
|
|
uint32_t cnak :
|
|
1;
|
|
uint32_t snak :
|
|
1;
|
|
uint32_t setd0pid :
|
|
1;
|
|
uint32_t setd1pid :
|
|
1;
|
|
uint32_t epdis :
|
|
1;
|
|
uint32_t epena :
|
|
1;
|
|
}
|
|
b;
|
|
} USB_OTG_dev_ep_ctl_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_dev_ep_txfer_siz_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t xfersize :
|
|
19;
|
|
uint32_t pktcnt :
|
|
10;
|
|
uint32_t mc :
|
|
2;
|
|
uint32_t reserved :
|
|
1;
|
|
}
|
|
b;
|
|
} USB_OTG_dev_ep_txfer_siz_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_dev_ep_txfer_size0_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t xfersize :
|
|
7;
|
|
uint32_t reserved7_18 :
|
|
12;
|
|
uint32_t pktcnt :
|
|
1;
|
|
uint32_t reserved20_28 :
|
|
9;
|
|
uint32_t supcnt :
|
|
2;
|
|
uint32_t reserved31;
|
|
}
|
|
b;
|
|
} USB_OTG_dev_ep_txfer_size0_data;
|
|
|
|
/******************************************************************************/
|
|
typedef union _USB_OTG_host_cfg_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t fslspclksel :
|
|
2;
|
|
uint32_t fslssupp :
|
|
1;
|
|
}
|
|
b;
|
|
} USB_OTG_host_cfg_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_Host_frm_intrvl_data
|
|
{
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t frint :
|
|
16;
|
|
uint32_t reserved :
|
|
16;
|
|
}
|
|
b;
|
|
} USB_OTG_Host_frm_intrvl_data;
|
|
|
|
/******************************************************************************/
|
|
#define HFNUM_MAX_FRNUM 0x3FFF
|
|
typedef union _USB_OTG_host_frm_nbr_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t frnum :
|
|
16;
|
|
uint32_t frrem :
|
|
16;
|
|
}
|
|
b;
|
|
} USB_OTG_host_frm_nbr_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_host_perio_tx_sts_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t ptxfspcavail :
|
|
16;
|
|
uint32_t ptxqspcavail :
|
|
8;
|
|
uint32_t ptxqtop_terminate :
|
|
1;
|
|
uint32_t ptxqtop_token :
|
|
2;
|
|
uint32_t ptxqtop_chnum :
|
|
4;
|
|
uint32_t ptxqtop_odd :
|
|
1;
|
|
}
|
|
b;
|
|
} USB_OTG_host_perio_tx_sts_data;
|
|
|
|
/******************************************************************************/
|
|
typedef union _USB_OTG_hprt0_data
|
|
{
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t prtconnsts :
|
|
1;
|
|
uint32_t prtconndet :
|
|
1;
|
|
uint32_t prtena :
|
|
1;
|
|
uint32_t prtenchng :
|
|
1;
|
|
uint32_t prtovrcurract :
|
|
1;
|
|
uint32_t prtovrcurrchng :
|
|
1;
|
|
uint32_t prtres :
|
|
1;
|
|
uint32_t prtsusp :
|
|
1;
|
|
uint32_t prtrst :
|
|
1;
|
|
uint32_t reserved9 :
|
|
1;
|
|
uint32_t prtlnsts :
|
|
2;
|
|
uint32_t prtpwr :
|
|
1;
|
|
uint32_t prttstctl :
|
|
4;
|
|
uint32_t prtspd :
|
|
2;
|
|
uint32_t reserved19_31 :
|
|
13;
|
|
}
|
|
b;
|
|
} USB_OTG_hprt0_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_host_all_int_data
|
|
{
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t ch0 :
|
|
1;
|
|
uint32_t ch1 :
|
|
1;
|
|
uint32_t ch2 :
|
|
1;
|
|
uint32_t ch3 :
|
|
1;
|
|
uint32_t ch4 :
|
|
1;
|
|
uint32_t ch5 :
|
|
1;
|
|
uint32_t ch6 :
|
|
1;
|
|
uint32_t ch7 :
|
|
1;
|
|
uint32_t ch8 :
|
|
1;
|
|
uint32_t ch9 :
|
|
1;
|
|
uint32_t ch10 :
|
|
1;
|
|
uint32_t ch11 :
|
|
1;
|
|
uint32_t ch12 :
|
|
1;
|
|
uint32_t ch13 :
|
|
1;
|
|
uint32_t ch14 :
|
|
1;
|
|
uint32_t ch15 :
|
|
1;
|
|
uint32_t reserved :
|
|
16;
|
|
}
|
|
b;
|
|
|
|
struct
|
|
{
|
|
uint32_t chint :
|
|
16;
|
|
uint32_t reserved :
|
|
16;
|
|
}
|
|
b2;
|
|
} USB_OTG_host_all_int_data;
|
|
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_host_all_int_msk_data
|
|
{
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t ch0 :
|
|
1;
|
|
uint32_t ch1 :
|
|
1;
|
|
uint32_t ch2 :
|
|
1;
|
|
uint32_t ch3 :
|
|
1;
|
|
uint32_t ch4 :
|
|
1;
|
|
uint32_t ch5 :
|
|
1;
|
|
uint32_t ch6 :
|
|
1;
|
|
uint32_t ch7 :
|
|
1;
|
|
uint32_t ch8 :
|
|
1;
|
|
uint32_t ch9 :
|
|
1;
|
|
uint32_t ch10 :
|
|
1;
|
|
uint32_t ch11 :
|
|
1;
|
|
uint32_t ch12 :
|
|
1;
|
|
uint32_t ch13 :
|
|
1;
|
|
uint32_t ch14 :
|
|
1;
|
|
uint32_t ch15 :
|
|
1;
|
|
uint32_t reserved :
|
|
16;
|
|
}
|
|
b;
|
|
|
|
struct
|
|
{
|
|
uint32_t chint :
|
|
16;
|
|
uint32_t reserved :
|
|
16;
|
|
}
|
|
b2;
|
|
} USB_OTG_host_all_int_msk_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_hc_char_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t mps :
|
|
11;
|
|
uint32_t epnum :
|
|
4;
|
|
uint32_t epdir :
|
|
1;
|
|
uint32_t reserved :
|
|
1;
|
|
uint32_t lspddev :
|
|
1;
|
|
uint32_t eptype :
|
|
2;
|
|
uint32_t multicnt :
|
|
2;
|
|
uint32_t devaddr :
|
|
7;
|
|
uint32_t oddfrm :
|
|
1;
|
|
uint32_t chdis :
|
|
1;
|
|
uint32_t chen :
|
|
1;
|
|
}
|
|
b;
|
|
} USB_OTG_hc_char_data;
|
|
|
|
/******************************************************************************/
|
|
typedef union _USB_OTG_hc_splt_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t prtaddr :
|
|
7;
|
|
uint32_t hubaddr :
|
|
7;
|
|
uint32_t xactpos :
|
|
2;
|
|
uint32_t compsplt :
|
|
1;
|
|
uint32_t reserved :
|
|
14;
|
|
uint32_t spltena :
|
|
1;
|
|
}
|
|
b;
|
|
} USB_OTG_hc_splt_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_hc_int_data
|
|
{
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t xfercomp :
|
|
1;
|
|
uint32_t chhltd :
|
|
1;
|
|
uint32_t ahberr :
|
|
1;
|
|
uint32_t stall :
|
|
1;
|
|
uint32_t nak :
|
|
1;
|
|
uint32_t ack :
|
|
1;
|
|
uint32_t nyet :
|
|
1;
|
|
uint32_t xacterr :
|
|
1;
|
|
uint32_t bblerr :
|
|
1;
|
|
uint32_t frmovrun :
|
|
1;
|
|
uint32_t datatglerr :
|
|
1;
|
|
uint32_t reserved :
|
|
21;
|
|
}
|
|
b;
|
|
} USB_OTG_hc_int_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
|
|
typedef union _USB_OTG_hc_txfer_siz_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t xfersize :
|
|
19;
|
|
uint32_t pktcnt :
|
|
10;
|
|
uint32_t pid :
|
|
2;
|
|
uint32_t dopng :
|
|
1;
|
|
}
|
|
b;
|
|
} USB_OTG_hc_txfer_siz_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_hc_int_msk_data
|
|
{
|
|
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t xfercompl :
|
|
1;
|
|
uint32_t chhltd :
|
|
1;
|
|
uint32_t ahberr :
|
|
1;
|
|
uint32_t stall :
|
|
1;
|
|
uint32_t nak :
|
|
1;
|
|
uint32_t ack :
|
|
1;
|
|
uint32_t nyet :
|
|
1;
|
|
uint32_t xacterr :
|
|
1;
|
|
uint32_t bblerr :
|
|
1;
|
|
uint32_t frmovrun :
|
|
1;
|
|
uint32_t datatglerr :
|
|
1;
|
|
uint32_t reserved :
|
|
21;
|
|
}
|
|
b;
|
|
} USB_OTG_hc_int_msk_data;
|
|
|
|
/******************************************************************************/
|
|
|
|
typedef union _USB_OTG_host_pcgcctl_data
|
|
{
|
|
uint32_t d32;
|
|
struct
|
|
{
|
|
uint32_t stoppclk :
|
|
1;
|
|
uint32_t gatehclk :
|
|
1;
|
|
uint32_t pwrclmp :
|
|
1;
|
|
uint32_t rstpdwnmodule :
|
|
1;
|
|
uint32_t physuspended :
|
|
1;
|
|
uint32_t reserved :
|
|
27;
|
|
}
|
|
b;
|
|
} USB_OTG_host_pcgcctl_data;
|
|
|
|
#endif /* STM32F10X_CL */
|
|
|
|
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
|
|
|
#endif
|