676b6c00d0
Bumps [litex/deps/litedram](https://github.com/enjoy-digital/litedram) from `080948d` to `2d021c8`.
- [Release notes](https://github.com/enjoy-digital/litedram/releases)
- [Commits](
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|---|---|---|
| .github | ||
| chisel/blink | ||
| docs | ||
| icestudio | ||
| litex | ||
| migen | ||
| mixed-hdl/blink | ||
| pcf | ||
| reference | ||
| riscv-blink | ||
| riscv-rust-blink | ||
| riscv-zig-blink | ||
| verilog | ||
| vhdl | ||
| .gitattributes | ||
| .gitignore | ||
| .gitmodules | ||
| .readthedocs.yml | ||
| board.mk | ||
| DEVELOPMENT.md | ||
| get-toolchain.py | ||
| LICENSE | ||
| micropython-fomu.dfu | ||
| README.md | ||
Hi, I'm Fomu! This workshop covers the basics of Fomu in a top-down approach. We'll start out by learning what Fomu is, how to load software into Fomu, how to write software for Fomu and finally how to write hardware for Fomu.
FPGAs are complex, weird things, so we'll take a gentle approach and start out by treating it like a Python interpreter first, and gradually peel away layers until we're writing our own hardware registers. You can take a break at any time and explore! Stop when you feel the concepts are too unfamiliar, or plough on and dig deep into the world of hardware.
The contents of this workshop is published at workshop.fomu.im.
Repository Contents
- docs - The actual workshop directions and content.
- litex - The files required for the Migen / LiteX section of the workshop.
- reference - Extra reference documentation such as schematics and part datasheets.
- riscv-blink - The files required for the Fomu as a RISC-V CPU section of the workshop.
- verilog - The files required for the Verilog on Fomu section of the workshop.
- vhdl - The files required for the VHDL on Fomu section of the workshop.
- mixed-hdl - The files required for the Mixed HDL on Fomu section of the workshop.
Development
For guidelines about how to develop the workshop or how to build the workshop locally, see DEVELOPMENT.