Now we properly inhibit other endpoints, and prevent the buffer from
draining when there's a debug packet.
This also prevents an early return from DEBUG READ.
Signed-off-by: Sean Cross <sean@xobs.io>
The EVT board has a pulldown, in case we want to do USB LS. This causes
issues on some hubs, because they end up with weak pullups, which throws
off enumeration.
Set it to a tristate input, which fixes this behavior.
Signed-off-by: Sean Cross <sean@xobs.io>
Much of the clock resource generator was duplicated for the two options:
PLL and adder. Remove this artifical distinction and reuse much of the
CRG code.
Signed-off-by: Sean Cross <sean@xobs.io>
This doesn't appear to work yet, but is the latest upstream release
version of vexriscv.
Need to investigate more into why it's failing.
Signed-off-by: Sean Cross <sean@xobs.io>
For some reason, -flto didn't like the "extern const struct" definition.
Hide the variable now and use an accessor function to silence this
warning, which may have caused other issues with stability.
Signed-off-by: Sean Cross <sean@xobs.io>
We're trying to improve performance and reduce core size.
This uses a newer version of the vexriscv core. It has a shorter
pipeline, with better exception handling. It also properly initializes
registers.
Signed-off-by: Sean Cross <sean@xobs.io>
The CPU we're using has no div/mul instructions, so use the rv32i ABI
instead of rv32im.
This saves about 15%.
Signed-off-by: Sean Cross <sean@xobs.io>
It turns out that just assigning a value isn't enough in Python to
assign the signal. You need to override the dictionary entry.
With this patch, it is now possible to dynamically adjust the CPU reset
entrypoint, which is handy for debugging.
Signed-off-by: Sean Cross <sean@xobs.io>
We were using the wrong offset for address calculation. Use the block
size, rather than the program size. This wasn't an issue before, because
the block size and the program size were both 256 bytes. Now the block
size can be 1024 bytes.
Signed-off-by: Sean Cross <sean@xobs.io>
The pll is necessary to get consistent performance, but disabling it can
sometimes help meet synthesis timing. Ensure the pll is enabled, unless
explicitly disabled with this switch.
Signed-off-by: Sean Cross <sean@xobs.io>
If a sentinal is present, allow dfu-util to load a program directly to
RAM. This saves us the step of writing to flash.
Signed-off-by: Sean Cross <sean@xobs.io>
We needed to pick a random, unused pin for "wp" on the Hacker board.
Unfortunately, I picked a pin that's used by the touchpads. Pick a
different unused pin.
Signed-off-by: Sean Cross <sean@xobs.io>