Commit Graph

75 Commits

Author SHA1 Message Date
Sean Cross
6f7ce8a1ae hw: foboot-bitstream: use -dffe_min_ce_use 5
This is required to get it to fit for now.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-07-21 13:46:43 +08:00
Sean Cross
eefa76706b hw: foboot-bitstream: remove bbspi
It isn't used anymore, and is just making the file bigger.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-07-21 12:34:54 +08:00
Sean Cross
c72a987a5d hw: foboot-bitstream: set min_ce_use to 4
This matches the comment, and shouldn't have any effect on the
resulting output.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-07-21 12:20:30 +08:00
Sean Cross
e7b55338be hw: foboot-bitstream: hardcode memory map
Rather than relying on the memory map from litex, hardcode the
memory offsets.

This is required because sometimes the litex memory map changes,
and we want to have a consistent offset across builds.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-07-21 12:19:13 +08:00
Sean Cross
bd08f0bb06 hw: foboot-bitstream: correct spi pin mappings for "dq"
The "dq" mappings for SPI were wrong, and wouldn't work with the
SPI flash in dual/quad mode.  Correct these mappings for all platforms.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-07-21 12:17:19 +08:00
Sean Cross
1e34d27f47 hw: foboot-bitstream: don't hardcode sram offset
Use the values from the memory map instead of hardcoding the offset.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-07-21 12:15:13 +08:00
Sean Cross
a45b6be459 hw: foboot-bitstream: use buffered output from pll
The PLL has two outputs: buffered and unbuffered.  Take the clock
signal from the buffered output.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-07-21 12:13:30 +08:00
Sean Cross
ee30de7946 hw: foboot-bitstream: use all 13 bits of the clock reset
There are 13 bits on the clock reset line, but right now we only use
12 of them.  Set the counter to 8191 so we take advantage of
all 13 bits.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-07-21 12:12:41 +08:00
Sean Cross
8c84afa4d9 hw: bitstream: add dummyusb if no cpu is present
This will allow us to still access the wishbone bus without a CPU.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-07-20 16:29:48 +08:00
Sean Cross
e1a1b60821 hw: foboot-bitstream: use GENCLK_HALF from PLL
This removes a double-flop that we were using to get a 12 MHz clock,
which we were then multiplying back up to 48 MHz.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-07-20 16:15:02 +08:00
Sean Cross
541c765198 hw: foboot-bitstream: fix --no-cpu flag
If there is no CPU, then don't adjust the CPU reset vector.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-07-20 16:14:35 +08:00
Sean Cross
a4a3dad324 hw: fix led ordering on hacker board and add id to "version"
Fix the ordering of the LEDs on the "hacker" board.

Add a "model id" to the "version" block.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-07-08 12:14:39 +08:00
Sean Cross
10454fa0be sbled: fix mapping of r,g,b and add bit-bang mode
Fix the mapping of red, green, and blue.  Now the LEDDPWRR, LEDDPWRG,
and LEDDPWRB map to their correct values.

Additionally, a bit-banged mode for the LED has been added to enable
fine-grained control in a simpler manner.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-07-08 10:13:09 +08:00
Sean Cross
c622551300
Merge pull request #15 from TomKeddie/tomk_20190701_flashaddr
Flash mapping address fixes
2019-07-07 09:20:57 +08:00
Sean Cross
d1cd68c232 hw: set debug bridge memory size to 0x100
Hardware breakpoints live at offset 0x40 from the start of this region,
so increase the size from 0x10 to 0x100.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-07-04 16:39:28 +08:00
Tom Keddie
1c8c1f3bc1 Flash mapping address fixes
- too many bits were allocated causing problems addressing 128Mbit devices
- the shift operator in python generates a signed shift in verilog which potentilly trashes the upper address bit, switch to padding
2019-07-03 02:59:20 -07:00
Sean Cross
f2084ea817 hw: foboot-bitstream: tab -> spaces
I wonder how that got in there...

Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-19 14:05:29 -07:00
Sean Cross
8354617950 Merge branch 'master' of github.com:im-tomu/foboot 2019-06-17 15:33:49 -07:00
Sean Cross
ccdf910ec1 hw: add --seed argument
Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-17 15:02:04 -07:00
Sean Cross
8a0df08507 foboot-bitstream: ce 5 again
Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-17 14:49:06 -07:00
Sean Cross
ce1f5c932a hw: foboot-bitstream: add an entry for the initial boot image
Add an entry for boot image 0.  Previously this was getting implied, but
due to the way Python arrays work, it was getting added to the end of
the list instead of the beginning.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-17 11:11:57 -07:00
Tom Keddie
341db19f70 Move bitstream sync constants to CONFIG entries 2019-06-13 20:20:24 -07:00
Sean Cross
c2d334e89c foboot-bitstream: move multiboot image 4 to 32768
Move the multiboot image #4 from 4096 bytes to 32768 bytes.

This helps to future-proof against larger disks which have bigger FATs.
Otherwise, the boot image could be located within the FAT, which would
cause problems.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-06-07 12:47:57 +08:00
Sean Cross
afdd649616 Merge branch 'master' of github.com:im-tomu/foboot 2019-05-26 15:57:41 +08:00
Sean Cross
f57e9b23ea foboot-bitstream: add "pvt" to list of values
Signed-off-by: Sean Cross <sean@xobs.io>
2019-05-26 15:44:02 +08:00
Sean Cross
f1f0f14d71 foboot-bitstream: use ce of 4
A ce of 5 resulted in a bitstream that didn't work.  Hmm...

Signed-off-by: Sean Cross <sean@xobs.io>
2019-05-23 22:11:54 +08:00
Sean Cross
b84a24a853 foboot-bitstream: use modern method of indicating debug
The litex core has changed how debug is indicated, instead preferring to
add suffixes to configurations.

Follow this convention when instantiating the main CPU.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-05-23 21:54:33 +08:00
Sean Cross
58fba5b90e hw: use ce 5
This lets us meet timing.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-05-20 13:17:58 +08:00
Sean Cross
ab16cc0119 foboot-bitstream: add "version" block
This block describes the various git version parameters.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-05-20 10:55:56 +08:00
Sean Cross
bbfd68ed72 foboot-bitstream: use 5 ce lines
This doesn't change much, but it prevents nextpnr from getting into an
infinite loop.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-05-14 10:24:37 +08:00
Sean Cross
5b71eeea7d foboot-bitstream: tristate pulldown on evt board
The EVT board has a pulldown, in case we want to do USB LS.  This causes
issues on some hubs, because they end up with weak pullups, which throws
off enumeration.

Set it to a tristate input, which fixes this behavior.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-05-05 17:40:07 -07:00
Sean Cross
21be05f8ab hw: foboot-bitstream: simplify duplicate CRG code
Much of the clock resource generator was duplicated for the two options:
PLL and adder.  Remove this artifical distinction and reuse much of the
CRG code.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-29 16:37:51 -07:00
Sean Cross
d147af1e6a hw: add some vexriscv experiments
We're trying to improve performance and reduce core size.

This uses a newer version of the vexriscv core.  It has a shorter
pipeline, with better exception handling.  It also properly initializes
registers.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-25 23:23:54 +08:00
Sean Cross
ee640fdb57 hw: foboot-bitstream: fix csr offsets
These offsets can shift.  Ensure they stay the same during subsequent
rebuilds.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-25 17:40:37 +08:00
Sean Cross
f94da96db4 hw: foboot-bitstream: properly hook up cpu reset override
It turns out that just assigning a value isn't enough in Python to
assign the signal.  You need to override the dictionary entry.

With this patch, it is now possible to dynamically adjust the CPU reset
entrypoint, which is handy for debugging.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-23 17:21:16 +08:00
Sean Cross
1a5867c5e5 hw: foboot-bitstream: invert logic on pll selection
The pll is necessary to get consistent performance, but disabling it can
sometimes help meet synthesis timing.  Ensure the pll is enabled, unless
explicitly disabled with this switch.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-22 15:09:48 +08:00
Sean Cross
722aee37d9 hw: foboot-bitstream: don't reuse touchpad for WP on hacker
We needed to pick a random, unused pin for "wp" on the Hacker board.
Unfortunately, I picked a pin that's used by the touchpads.  Pick a
different unused pin.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-22 10:03:48 +08:00
Sean Cross
78d861d14a hw: foboot-bitstream: add gpios for touch pads
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-21 21:46:29 +08:00
Sean Cross
4b16e24c9a hw: add csr for cpu reset address, and add full endpoint suite
Add all endpoints so we can have either a serial port or a mass storage
device.

Also add a CSR to allow us to set the reset address of the CPU.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-20 00:06:10 +08:00
Sean Cross
91a205fe2c Merge branch 'master' of github.com:im-tomu/foboot into wishbone-debug
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-18 21:35:20 +08:00
Sean Cross
f8f2ec638f hw: foboot-bitstream: add usb to debug options
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-18 21:32:50 +08:00
Sean Cross
3b809e70f7 hw: minor text cleanup on foboot-bitstream
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 15:48:24 +08:00
Sean Cross
ddff12cd02 hw: fix spi so code execution works
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 13:23:44 +08:00
Sean Cross
9cb4e4a8ce WIP: riscv boot
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 09:40:28 +08:00
Sean Cross
cf574019a0 hw: remove obsolete call to icemulti
We make our images from scratch.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 09:38:44 +08:00
Sean Cross
acb4b998da hw: add another boot image
Still trying to decide on the image order.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-11 09:38:09 +08:00
Sean Cross
3a51f55ee7 hw: foboot-bitstream: replace bbspi with picorvspi
Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-10 16:44:05 +08:00
Sean Cross
7774fdd7e7 hw: fomu_flash: add spi controller from picorv32
This controller supports many features, including bit-bang mode and
memory-mapped access.  It should replace the previous module
entirely.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-10 16:42:59 +08:00
Sean Cross
63f5dc75de hw: foboot-bitstream: add an option to build with no cpu
Building with no CPU is faster, and can be very handy for debugging
various hardware blocks when using litex_server.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-10 16:41:17 +08:00
Sean Cross
d89eea3934 usb: refactor state machine to work with xhci devices
Due to some subtle quirks, as well as a poorly-implemented state machine,
foboot was not compatible with many Desktop devices.

This should fix the implementation so that it is more compatible.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-04-08 17:19:54 +08:00